Voltage generating circuit causing no threshold voltage loss by

Electric power conversion systems – Current conversion – With voltage multiplication means

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323313, H02M 318

Patent

active

053574168

ABSTRACT:
An improved substrate bias voltage generating circuit provided in a semiconductor device such as a DRAM is disclosed. In a conducting period of an NMOS transistor (8) provided in a last stage, a higher enough voltage than a source voltage (i.e. an output voltage V.sub.BB) can be applied to a gate of the transistor (8). Loss for a threshold voltage of the transistor (8) does not occur in the output voltage V.sub.BB ; the substrate bias voltage V.sub.BB of a level -Vcc can be generated.

REFERENCES:
patent: 4229667 (1980-10-01), Heimbigner et al.
patent: 4346310 (1982-08-01), Carter
patent: 4616303 (1986-10-01), Mauthe
patent: 4803612 (1989-02-01), Skovmand

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