Voltage generating circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Reexamination Certificate

active

07365591

ABSTRACT:
A first transistor is arranged between a reference voltage node and a first node, and is connected at its gate to a second node. A second transistor is arranged between the second node and the reference voltage node, and is connected at its gate to the first node. Charges are supplied to the first and second nodes via capacitance elements receiving first and second control signals, respectively. Further, a third transistor is arranged between the second node and an output node, and is connected at its gate node to a third control signal φCT via a third capacitance element. A fourth transistor is connected between the output node and a gate node of the third transistor, and is connected at its gate to the second node. An internal voltage at an intended level can be generated with low power consumption while efficiently using charges without causing an ineffective current flow.

REFERENCES:
patent: 6130572 (2000-10-01), Ghilardelli et al.
patent: 6198342 (2001-03-01), Kawai
patent: 6642773 (2003-11-01), Lin et al.
patent: 2002/0122324 (2002-09-01), Kim et al.
patent: 196 01 369 (1997-04-01), None
patent: 4-372792 (1992-12-01), None
Yoshinobu Nakagome, et al., “An Experimental 1.5-V 64-Mb DRAM”, IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991, pp. 465-472.
Dragan Maksimovic, et al., “Switched-Capacitor DC-DC Converters for Low-Power On-Chip Applications”, Power Electronics Specialists Conference PESC 1999, 30thAnnual IEEE, vol. 1, Jun. 27, 1999, pp. 54-59.

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