Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2001-02-27
2002-06-18
Wong, Peter S. (Department: 2838)
Electricity: power supply or regulation systems
Self-regulating
Using a three or more terminal semiconductive device as the...
C323S316000, C327S541000, C365S226000
Reexamination Certificate
active
06407538
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to voltage down converters used in semiconductor memory devices.
2. Description of the Background Art
To accommodate increased storage capacity in the semiconductor memory devices, a great effort has been made to achieve higher densification and higher integration. One technique that realizes the higher densification and higher integration is a miniaturization of component elements.
The advancement in miniaturization of component elements has an adverse effect of decrease in breakdown voltage of insulated gate field effect transistors (hereinafter referred to as MOS transistors), which are component elements. Therefore, when a power supply voltage received from an external source as an operating power supply voltage is directly supplied to an MOS transistor, the power supply voltage exceeds the breakdown voltage of the MOS transistor, and a sufficient reliability cannot be secured with regard to factors such as breakdown voltage of insulated films.
Hence, in dynamic semiconductor memory devices hereinafter referred to as DRAM) with the storage capacity equal to or exceeding 16 Mbit, for example, an external power supply voltage is lowered to the level of an internal power supply voltage and each component element is operated with the internal power supply voltage to secure a sufficient reliability of each component element.
FIG. 7
is a schematic block diagram showing an overall structure of an DRAM
140
as an example of a conventional semiconductor memory device. In
FIG. 7
, DRAM
140
includes an internal circuit
90
, a voltage down converter
91
and a circuit
92
operated with an external power supply voltage.
Voltage down converter
91
lowers the level of an external power supply voltage VCC supplied to a VCC power supply node to generate an internal power supply voltage VCCS on a VSS power supply node.
Internal circuit
90
operates using internal power supply voltage VCCS on a VCCS power supply node as an operating power supply. Such internal circuit
90
includes a memory cell array having a plurality of MOS transistors as component elements, a sense amplifier performing a sense amplification of data read out from the memory cell array and so on.
Circuit
92
operated with an external power supply voltage operates with external power supply voltage VCC on VCC power supply node as an operating power supply. Such circuit
92
operated with external power supply voltage includes a circuit performing data input/output.
Here, internal circuit
90
, voltage down converter
91
and circuit
92
operated with an external power supply voltage receive a power supply voltage VSS (hereinafter referred to as a ground voltage) of a different level from external power supply voltage VCC at the VSS power supply node.
Therefore, in the memory cell or the sense amplifier, that is, internal circuit
90
, MOS transistors, which are their component elements, receive internal power supply voltage VCCS generated by lowering external power supply voltage VCC as an operating power supply voltage.
Thus, even when the higher densification and higher integration of the memory cell array is achieved and the breakdown voltage of the MOS transistor, which is a component element, decreases as a result of miniaturization, a voltage applied to a gate insulated film thereof can be suppressed to a low level. Therefore, the reliability of the component elements can be secured and a stable and reliable operation of DRAM
140
as a whole can be obtained.
FIG. 8
is a circuit diagram showing a structure of conventional voltage down converter
91
shown in FIG.
7
. In
FIG. 8
, voltage down converter
91
includes an operational amplifier
70
and a P channel MOS transistor
77
.
Operational amplifier
70
receives an internal power supply voltage VCCS, which is to be an output of voltage down converter
91
, at its positive, input and receives a reference voltage VREF from a reference voltage generation circuit not shown at its negative input. Operational amplifier
70
performs an operational amplification on reference voltage VREF and an internal power supply voltage VDD to output a control voltage VOUT at an output node
75
.
Then, P channel MOS transistor
77
, under the control of control voltage VOUT, supplies a current from the VCC power supply node to a power supply node
78
to adjust a voltage level of internal power supply voltage VCCS at power supply node
78
.
Operational amplifier
70
forms a current mirror type operational amplifier including P channel MOS transistors
71
and
72
, N channel MOS transistors
73
and
74
and constant-current source circuit
76
as shown in FIG.
8
.
Here, P channel MOS transistor
71
and N channel MOS transistor
73
, and P channel MOS transistor
72
and N channel MOS transistor
74
are connected in parallel with each other and both pairs are connected between VCC power supply node and one terminal of constant-current source circuit
76
.
Further, N channel MOS transistor
73
receives reference voltage VREF at its gate, whereas N channel MOS transistor
74
receives internal power supply voltage VCCS on power supply node
78
at its gate.
Constant-current source circuit
76
has another terminal connected to the VSS power supply node. Constant-current source circuit
76
also controls the amount of current of operational amplifier
70
such that a sum of a current amount flowing from N channel MOS transistor
73
and a current amount flowing from N channel MOS transistor
74
is always at a constant level.
Control voltage VOUT of operational amplifier
70
is output from output node
75
, which is a connection point of P channel MOS transistor
71
and N channel MOS transistor
73
.
A connection node
79
, that is a connection point of P channel MOS transistor
72
and N channel MOS transistor
74
is connected to respective gates of P channel MOS transistor
71
and P channel MOS transistor
72
.
Operational amplifier
70
operates with external power supply voltage VCC and ground voltage VSS as operating power supply, and when a level of internal power supply voltage VCCS rises above a level of reference voltage VREF, operational amplifier
70
raises a voltage level of output node
75
, that is control voltage VOUT, up to a level of external power supply voltage VCC at the highest.
As a result, the channel resistance of P channel MOS transistor
77
receiving control voltage VOUT at its gate increases to reduce the current supply from the VCC power supply node to power supply node
78
and to lower the voltage level of internal power supply voltage VCCS.
On the other hand, when internal power supply voltage VCCS falls below the level of reference voltage VREF, operational amplifier
70
lowers control voltage VOUT to the level of ground voltage VSS (=0 V) at the lowest.
As a result, P channel MOS transistor
77
becomes conductive and amount of current supplied from the VCC power supply node to power supply node
78
increases and the level of internal power supply voltage VCCS is raised.
Thus, voltage down converter
91
feeds back internal power supply voltage VCCS and compares internal power supply voltage VCCS with reference voltage VREF. Then, the result of comparison is amplified to generate control voltage VOUT, which is used for controlling P channel MOS transistor
77
used for driving the power supply. Thus, voltage down converter
91
operates to hold internal power supply voltage VCCS at a constant voltage level, that is the level of reference voltage.
In voltage down converter
91
shown in FIG.
8
. however, in some cases the voltage level of internal power supply voltage VCCS stays at a level significantly lower than the level of reference voltage VREF, depending on an operation state of internal circuit
90
which uses internal power supply voltage VCCS output from voltage down converter
91
as an operating power supply, and the voltage level of internal power supply voltage VCCS cannot be secured at a target value, which is the voltage l
Kinoshita Mitsuya
Morishita Fukashi
Laxton Gary L.
Mitsubishi Denki & Kabushiki Kaisha
Wong Peter S.
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