Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Reexamination Certificate
2005-12-06
2005-12-06
Nguyen, John B (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
C327S143000, C327S530000
Reexamination Certificate
active
06972703
ABSTRACT:
A voltage detection circuit. A second NMOS transistor has a gate coupled to the gate of a first NMOS transistor. A comparator has input terminals, and an output terminal. A first resistor is coupled between the first input terminal and the source of the first NMOS transistor, a second resistor is coupled to the comparator and the first resistor, a third resistor is coupled between the second resistor and the comparator, and a fourth resistor is coupled between the second and third resistors, and ground. A first PMOS transistor has a gate coupled to the gates of the first and second NMOS transistors. A second PMOS transistor has a connected gate and drain, a source coupled to the gates of first and second NMOS transistors, a drain coupled to ground, and an n-well directly connected to the gates of the first and second NMOS transistors.
REFERENCES:
patent: 5814995 (1998-09-01), Tasdighi
patent: 6169426 (2001-01-01), Lee et al.
patent: 6445218 (2002-09-01), Lee
Lee Chao-Chi
Yen Wen-Cheng
Faraday Technology Corp.
Hsu Winston
Nguyen John B
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