Voltage converter circuit with self-oscillating half-bridge...

Details Voltage converter circuit with self-oscillating half-bridge... Voltage converter circuit with self-oscillating half-bridge...

2001-07-17

2002-10-29

Berhane, Adolf Denske (Department: 2838)

Electric power conversion systems

Current conversion

Including automatic or integral protection means

C363S132000

Reexamination Certificate

active

06473320

ABSTRACT:

TECHNICAL FIELD
The present invention regards a voltage converter circuit with self-oscillating half-bridge configuration and with protection against hard switching.
BACKGROUND OF THE INVENTION
As is known, in all applications requiring conversion of a DC or low frequency AC voltage into an AC voltage having a higher frequency, for example, lighting applications in which the mains voltage with a frequency of 50 Hz is converted into a voltage with a frequency of 30-50 kHz for driving fluorescent or halogen lamps, voltage converter circuits are used generally having a self-oscillating half-bridge configuration.
According to a known solution, a voltage converter circuit
1
having a self-oscillating half-bridge configuration is shown in
FIG. 1
, and comprises first and second input terminals
2
a
,
2
b
(the second input terminal
2
b
being connected to ground), between which an input voltage V
in
is supplied, and first and second output nodes
3
a
,
3
b
, between which an output voltage V
out
is supplied. A capacitive divider
4
is connected between the pair of input terminals
2
a
and
2
b
and comprises a first capacitor
5
, having a capacitance C
1
, and a second capacitor
6
, having a capacitance C
2
connected in series.
Between the input terminals
2
a
,
2
b
are also connected first and second power switches
7
,
8
forming the two branches of the bridge. In particular, the first power switch
7
is connected between the first input terminal
2
a
and the first output node
3
a
(also referred to as “middle point”), and the second power switch
8
is connected between the first output node
3
a
and the second input terminal
2
b.
In addition, between the first output node
3
a
and the second output node
3
b
is connected a resonant load
10
comprising a lamp
12
connected in parallel to a capacitor
13
and in series to an induction coil
14
.
Each of the power switches
7
,
8
has a respective control terminal
17
,
18
connected to output terminals of an integrated circuit
15
controlling, in phase opposition, the opening or closing of the power switches
7
,
8
. In particular, when the integrated circuit
15
controls closing of the first power switch
7
and opening of the second power switch
8
, the first output node
3
a
is connected to the first input terminal
2
a
; instead, when the integrated circuit
15
controls opening of the first power switch
7
and closing of the second power switch
8
, the first output node
3
a
is connected to the second input terminal
2
b
. In this way, an alternating output voltage V
out
is obtained at a frequency determined by switching of the switches
7
,
8
and is controlled by the integrated circuit
15
.
Voltage converter circuits are moreover known using discrete circuits for controlling opening and closing of power switches
7
,
8
. In particular,
FIG. 1
b
is a schematic representation of a voltage converter circuit
100
comprising first and second oscillating circuits
101
,
102
, and a transformer
103
. The first and second oscillating circuits
101
and
102
and the transformer
103
drive opening or closing of the power switches
7
,
8
to generate the oscillations of the voltage supplied to the load. More specifically, the first oscillating circuit
101
is connected in parallel to the first power switch
7
and is triggered by means of a first secondary winding
104
. Likewise, the second oscillating circuit
102
is connected in parallel to the second power switch
8
and is triggered by means of a second secondary winding
105
. The secondary windings
104
,
105
are connected to the transformer
103
. A DIAC device
106
is connected to the second power switch
8
and is used to initiate the voltage converter circuit
100
.
FIG. 1
c
shows another known voltage converter circuit, designated by
200
and comprising an oscillating circuit
201
and a driving block
203
for controlling opening or closing of the power switches
7
,
8
. The oscillating circuit
201
is connected to the first power switch
7
and is triggered by means of a secondary winding
202
, whilst the driving block
203
is directly connected to the second input terminal
2
b
and to the second switch
8
, and is connected to the first power switch
7
by means of a level shifter
204
. A DIAC device
206
is connected to the second power switch
8
and is used to initiate the voltage converter circuit
200
.
FIG. 1
d
shows a further known voltage converter circuit, designated by
300
and comprising a first driving circuit
301
connected to the first power switch
7
and a second driving circuit
302
connected to the second power switch
8
. Both driving circuits
301
,
302
are triggered by means of a respective secondary winding
303
,
304
. The secondary windings
303
,
304
are connected to a saturable core transformer
305
, which in turn is connected to a resonant load
306
by means of a winding
307
. Also in this case, to initiate the voltage converter circuit
300
a DIAC device
308
connected to the second power switch
8
is used.
In order to operate correctly, the known solutions described above must meet the following two conditions:
they must not have the power switches switched on simultaneously; namely,
they must have a zero voltage condition across the power switches at the moment in which they switch on (zero voltage switching condition). In this way, the switches are prevented from dissipating a high power when they switch on (“hard switching”).
In particular, the latter condition is satisfied by appropriately delaying switching on of the power switches. In this connection, switching off of the second power switch
8
generates a positive variation in the value of the voltage present on the output node
3
a
. This voltage, after a rise time T
r
, depending on the value of the current flowing in the induction coil
14
and on the equivalent capacitance present on the output node
3
a
, assumes the value of the voltage present on the first input terminal
2
a
. Consequently, to satisfy the zero voltage switching condition, it is necessary to delay switching on of the first power switch
7
by a time at least equal to the rise time T
r
. In a similar way, switching off of the first power switch
7
generates a negative variation in the value of the voltage present on the output node
3
a
. The latter voltage, after a fall time T
f
, depending on the value of the current flowing in the induction coil
14
and on the value of the equivalent capacitance present on the output node
3
a
, assumes the value of the voltage present on the second input terminal
2
b
. Also in this case, then, to satisfy the zero voltage switching condition it is necessary to delay switching on of the second power switch
8
by a time at least equal to the fall time T
f
.
In the voltage converter circuit of
FIG. 1
a
, the delay is obtained by inserting a timing circuit inside the integrated circuit
15
(plus a few components outside the integrated circuit), whereas in the voltage converter circuits of
FIGS. 1
b
,
1
c
and
1
d
, the delay is normally obtained by means of an RC type network.
These known solutions present, however, the drawback of generating a fixed delay which is independent of the plot of the voltage present on the output node
3
a
. This means that if there is a change in the values of the capacitances C
1
and C
2
, upon which the value of the equivalent capacitance present on the output node
3
a
depends, and/or there is a change in the value of the inductance associated to the induction coil
14
, the zero voltage switching condition might no longer be respected.
SUMMARY OF THE INVENTION
According to an embodiment of the present invention, a voltage converter circuit is provided, which overcomes the limitations and drawbacks referred to above.
The voltage converter circuit has first and second input terminals; and first and second output nodes; a first power switch connected between the first input terminal and the first output node; a second power switch connected between the first out

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