Oscillators – Ring oscillators
Reexamination Certificate
1999-11-29
2001-08-21
Kinkead, Arnold (Department: 2817)
Oscillators
Ring oscillators
C331S046000, C331S074000, C327S263000, C327S264000
Reexamination Certificate
active
06278334
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of voltage controlled oscillators. More particularly, but not exclusively, this invention relates to voltage controlled oscillators of a type suitable for use in generating clock signals used to drive digital circuits.
2. Description of the Prior Art
As digital integrated circuits scale down in size and increase in speed it becomes increasingly difficult to provide noise and jitter free clock signals. Phase locked loop systems including voltage controlled oscillators are often used in the synthesis of clock signals in digital systems. Voltage controlled oscillators generate an output signal with a frequency that is dependent upon an input control signal. The input control signal is a particularly sensitive node within the system as it is typically left floating for a large proportion of the time and so small noise voltages can produce large frequency shifts, e.g. a one Volt change in the input control voltage might produce a 100 MHz change in the oscillator output signal frequency. The input control signal may be either single ended or differential.
Differential control voltage systems are more complex to design and fine tune than single ended systems. Differential systems also tend to consume more power due to the additional and larger circuitry they contain and have more failure mechanisms. However, differential systems typically have a greater input control signal range than single ended system and this can be an advantage as a given frequency range of the voltage controlled oscillator can be provided using a wider input control signal range so making the oscillator output less prone to noise on the input control signal. An example of a complex differential phase locked loop system can be found in ISSCC Digest of Technical Papers, February 1995, page 112.
Single ended control voltage systems are generally more popular than differential systems due to their simplicity and proven performance. Typically the input control voltage is supplied to the gate of a single FET (the gate connection allows the voltage to float as is needed) which acts as a voltage to current converter. The resulting current then acts to control a current controlled oscillator. A problem with such systems is that the voltage-to-current FET conducts substantially zero current until the input control signal passes a threshold level and at the other end of the voltage range saturation effects degrade the linear response. This limits the control voltage range, particularly as long channel FETs are used that tend to have higher threshold voltages. Examples of single ended voltage controlled oscillators can be found in the IEEE Journal of Solid State Circuits November 1998, page 1636; October 1997, page 1516; April 1997, page 584; April 1995, page 383 and November 1992, page 1599.
The problem of a reduced control voltage range due to threshold voltage effects can also occur differential systems. The threshold voltage problem is made worse by reducing the operating voltage of the oscillator in an effort to reduce power consumption a since the input control signal range lies between the substantially fixed threshold voltage and the reduced operating voltage level.
The present invention has the object of addressing the above described problems.
SUMMARY OF THE INVENTION
Viewed from one aspect the present invention provides a voltage controlled oscillator for generating an oscillator output signal with an oscillator output frequency controlled by an input control signal, said voltage controlled oscillator comprising:
a ring oscillator circuit having a plurality of oscillator stages linked in a ring with each oscillator stage generating a stage output signal that changes state between a first signal level and a second signal level in response to a change in state of a stage output signal of a preceding oscillator stage in said ring, said change between said first signal level and said second signal level taking place a propagation delay time after said change in state of said stage output signal of said preceding oscillator stage; wherein
at least one of said oscillator stages includes:
(i) a signal level change accelerating circuit that acts to decrease said propagation delay time and increase said oscillator output frequency in response to a first change in said input control signal; and
(ii) a signal level change decelerating circuit that acts to increase said propagation delay time and decrease said oscillator output frequency in response a second change in said input control signal, said first change and said second change being respective different ones of an increase in said input control voltage and a decrease in said input control signal.
Providing both a signal level change accelerating circuit and a signal level change decelerating circuit for altering the propagation delay time of the oscillator stage has the advantage that whilst a first of these signal level change circuits may be inactive due to a threshold level effect the second will be active in changing the oscillator output frequency and similarly at the other end of the input control signal range when the second is inactive in further changing the oscillator output frequency, the first will still produce a change in the oscillator output frequency when the input control signal is changed. Thus, the wider span of input control signal effectiveness in changing the oscillator output frequency results in that for a given range of oscillator output frequency the system will be less sensitive to a given amount of noise on the input control signal.
Whilst the oscillator stages could have various different forms, a compact circuit is provided in embodiments in which said at least one of said oscillator stages includes an invertor that generates said stage output signal by inverting said stage output signal of said preceding oscillator stage.
The first signal level and the second signal level between which the oscillator output signal swings could have various values. However, in preferred embodiments of the invention a first rail voltage signal having a first rail voltage signal level and a second rail voltage signal having a second rail voltage signal level are supplied to said voltage controlled oscillator, said first signal level and said second signal level being equal to respective ones of said first rail voltage signal level and said second rail voltage signal level.
Providing that the oscillator stage output signal swings between the full rail voltages has the advantage of further reducing the noise sensitivity of the system.
Whilst the signal level change accelerating circuit could take various different forms an advantageously compact and robust system is provided in embodiments in which said at least one oscillator stage drives said stage output signal to change from said first signal level to said second signal level, said signal level change accelerating circuit acts to accelerate said change, to a degree controlled by said input control voltage, by driving said stage output signal in a manner supporting said change from said first signal level to said second signal level.
Whilst the signal level change decelerating circuit could take various different forms an advantageously compact and robust system is provided in embodiments in which said at least one oscillator stage drives said stage output signal to change from said first signal level to said second signal level, said signal level change decelerating circuit acts to decelerate said change, to a degree controlled by said input control signal, by driving said stage output signal of said preceding oscillator stage in said ring in a manner opposing said change from said first signal level to said second signal level.
In particularly preferred compact embodiments said level change accelerating circuit comprises a first stack of gates having a first gate controlled by said stage output signal of said preceding oscillator stage in said ring and a second gate controlled by said input control signal.
In pa
ARM Limited
Kinkead Arnold
Nixon & Vanderhye P.C.
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