Voltage-controlled oscillator circuit for direct modulation

Oscillators – With frequency adjusting means – With voltage sensitive capacitor

Reexamination Certificate

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Details

C331S1170FE, C331S03600C, C331S179000, C331S167000

Reexamination Certificate

active

06774736

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to frequency modulation and more particularly to an improved voltage-controlled oscillator circuit (VCO) to effect direct modulation.
BACKGROUND OF THE INVENTION
A phase-locked loop (PLL) circuit is a type of control loop in which both the phase and frequency of a local oscillator is maintained close (“locked”) to the phase and frequency of an external reference signal. PLL circuits are implemented in a wide variety of electronic devices including frequency synthesizers for transceivers in radio communication devices. PLL circuits are attractive in modulation applications due to their combination of controllable modulation and stable and adjustable carrier frequency.
FIG. 1
shows a block diagram of a typical PLL circuit in accordance with the prior art. The PLL circuit
100
, shown in
FIG. 1
, includes five basic components: a phase and frequency comparator (phase and frequency detector)
105
, a charge pump
106
, a loop filter
110
, a voltage controlled oscillator (VCO)
115
, and a clock divider (frequency divider)
120
. The components are connected in a feedback configuration as shown in FIG.
1
. The phase detector
105
compares the phase and frequency of the input reference clock signal
102
with the phase and frequency of the feedback VCO signal
108
through the clock divider
120
. The charge pump
106
provides a DC output signal
103
proportional to the phase and frequency difference of the two signals. The VCO circuit generates a frequency proportional to its input voltage. The output voltage of the charge pump
106
is used to adjust the VCO
115
until the difference in phase and frequency between the two signals is very small.
The VCO may be used to implement a frequency modulation scheme. For example, a VCO circuit typically used in IQ modulation includes a series of variable capacitors for coarsely tuning the center output frequency and a varactor (voltage controlled capacitor) for finely tuning the center output frequency to the desired frequency. For IQ modulation the VCO circuit is used to set the carrier frequency. Then IQ modulation circuitry is used to modulate the center frequency with a waveform that slightly changes the carrier's frequency. The in-phase (I) portion and the quadrature (Q) portion of the modulating signal contain the transmitted data. For such modulation techniques, in which the VCO only acts to set the center frequency, there is no stringent requirement of linearity for the VCO circuit gain (KVCO). Therefore, the use of a varactor, that produces a linear voltage/frequency characteristic over only a small range, does not present a problem.
In contrast, direct modulation requires a very linear KVCO for greater ranges. For direct modulation, digital data is sent to the PLL, and then based upon this data, a control voltage is generated that includes both the center frequency and the data signal. The control voltage of the VCO is being modulated so modulation depends solely on the linearity of the VCO. With direct modulation the modulating wave shifts a center output frequency between predetermined values, i.e., two different carrier frequencies are used to represent zero and one, respectively. The carrier frequencies, f
0
and f
1
(representing 0 or 1) are typically shifted in like amount from a center frequency. For example, for a wireless standard having 79 channels in a frequency range of 2402 Mhz-2480 Mhz with each channel separated by 1 Mhz the center frequencies may be equal to 2402 Mhz+nMhz (n=0 to 78). For example, for center frequency f
c
equal to 2402 Mhz, f
0
equals 2402 Mhz minus some value (e.g., 160 Khz) and f
1
equals 2402 Mhz plus a corresponding value. Of course the carrier frequencies are not individual frequencies, but cover a range of frequencies depending on the type of modulation and the signal waveform. Therefore, f
0
may range from f
c
-140 Khz to f
c
-170 Khz and f
1
may be range from f
c
+140 Khz to f
c
+170 Khz. For such a modulation scheme a linear KVCO is required over a much larger range compared with other modulation techniques (e.g., IQ modulation).
Another drawback of the prior art VCO (in addition to the small range of KVCO linearity) in terms of implementing direct modulation is that the varactor's voltage-capacitance curve is linear in only a very small region. The bias voltage required for the varactor to operate in the linear range may be outside the voltage range of the VCO power supply.
A further consideration is external noise. Typically, for radio communication applications, the bandwidth of loop filter
110
is very small. A small loop filter bandwidth necessitates large capacitance and resistance values. These are usually too big to be implemented as integrated components and so the loop filter may be implemented externally (i.e., external to the PLL chip). The signal may pick up some noise as it passes from the PLL chip through the bonding wire and PCB and back to the PLL chip.
A VCO that addresses these issues may be significantly better for implementing a direct modulation scheme.
SUMMARY OF THE INVENTION
A voltage-controlled oscillator (VCO) circuit is described for a fractional-n PLL circuit (i.e., having a fractional-n frequency divider). The VCO circuit includes a variable capacitor for coarse tuning and a varactor for fine tuning. The variable capacitor provides a plurality of capacitance values, each capacitance value corresponds to a distinct frequency band. The capacitance values are selected so as to provide a frequency/voltage characteristic for the VCO that is sufficiently linear to implement direct modulation for the frequency band. A capacitor is placed in series with the varactor to linearize the frequency/voltage characteristic of the varactor. The series capacitor value is sufficient to implement direct modulation for a specified channel frequency within the frequency band.
Other features and advantages of the present invention will be apparent from the accompanying drawings, and from the detailed description, that follows below.


REFERENCES:
patent: 3302138 (1967-01-01), Brown et al.
patent: 4088968 (1978-05-01), Pradal et al.
patent: 4736169 (1988-04-01), Weaver et al.
patent: 5739730 (1998-04-01), Rotzoll
patent: 6268778 (2001-07-01), Mucke et al.
patent: 6469587 (2002-10-01), Scoggins
patent: 6483390 (2002-11-01), Welland
patent: 06350335 (1994-12-01), None
Parker et al., “A Low-Noise 1.6-GHz CMOS PLL with On-Chip Loop Filter,” IEEE, 407-410, 1997.
Samori et al., “Phase Noise Degradation at High Oscillation Amplitudes in LC-Tuned VCO's,” IEEE Journal of Solid-State Circuits, vol. 35, No. 1, 96-99, Jan. 2000.
Zannoth et al., “A Single-Chip Bipolar 1.6-GHz VCO with Integrated-Bias Network,” IEEE Transactions on Microwave Theory and Techniques, vol. 48, No. 2, 203-205, Feb. 2000.
PCT Report for PCT/US 03/00468, 7 pages, May 9, 2003.

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