Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2000-06-22
2002-04-02
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S205000, C327S206000, C327S072000, C327S080000
Reexamination Certificate
active
06366136
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to signal detection circuits, such as voltage comparators, and in particular, to voltage comparator circuits with hysteresis.
2. Description of the Related Art
As integrated circuits become increasingly complex and the number of functions they perform become more numerous, it has become increasingly important that such integrated circuits be capable of interfacing with signal sources that generate large or otherwise unusual signals. This is particularly true in mixed signal applications where the integrated circuits is often a digital circuit that operates with binary logic and is powered by a low voltage power supply and yet must be capable of dealing with analog signals which can exceed the voltage or current handling capabilities of the integrated circuit.
For example, integrated circuits for controlling video monitors that use cathode ray tubes (CRTs), such as those typically used with personal computers, must be able to work with many types of large signals. One example would be the horizontal and vertical flyback pulses generated during the horizontal and vertical retrace intervals, respectively, of the video display. Referring to
FIG. 1
, in the case of the vertical flyback pulses, such pulses can be in the range of 50 volts peak-to-peak with bipolar values, i.e., with much of the signal being positive but also some of the signal being negative with respect to the system reference, or ground.
Referring to
FIG. 2
, one example of such an integrated circuit includes an internal amplifier stage A
1
which is responsible for converting such pulses into a digital pulse stream for use elsewhere within the system. An external resister Rext is used to limit the current flowing into and out from the circuit as well as limit the maximum input voltage appearing at the input terminal T to values less than the power supply rails. The external capacitor Cext is used in conjunction with the external resister Rext and the effective internal resistance Rth at terminal T to partially differentiate the vertical flyback signal Vertfb, thereby removing DC and low frequency signal components.
As noted, the input resistance at the input terminal T is established by the resistance Rth, while the DC voltage at the input terminal T is established by a DC voltage source Vth. The voltage comparator VC is designed to have hysteresis (discussed in more detail below) so as to be unaffected by noise contained within the input signal, such as horizontal rate signal noise which is often contained within the vertical flyback pulses. For positive signal excursions of the input signal, the voltage comparator VC triggers at the input terminal threshold voltage Vth, while for negative signal excursions it triggers at a different threshold voltage. Additionally, diodes D
1
, D
2
are used at the input terminal T to provide protection against electrostatic discharge (ESD) events in accordance with well-known techniques.
In this application, the input stage A
1
generates a digital signal Vstart which is used to start a counter, or timer. The positive, or rising, edge of this signal Vstart sets a counter/timer which counts horizontal intervals using the horizontal blinking signal Hblank, and is initially transmitted through as the output signal Vblank via an OR logic gate (since the counter/timer may take as long as one horizontal line interval to begin timing the duration of the pulse). The timer resets the final output signal Vblank when it reaches a value which has been preset in accordance with data stored in a vertical counter register Vcount (which has been preset by a microcontroller via an I
2
C interface). During the active time of the output signal Vblank, an AND logic gates prevents any further transitions of the input signal Vstart from retriggering the counter.
Referring to
FIG. 3
, it can be seen that it is important that the positive pulse period of the vertical flyback signal be sufficiently long during the initial interval to prevent the output signal Vblank from switching back to a low state from its high state. In other words, this positive pulse interval t
1
should be at least as long as one horizontal scan interval. The pulse width t
2
of the output signal Vblank will be the product of the horizontal scan interval th and the contents of the Vcount register.
SUMMARY OF THE INVENTION
A voltage comparator with hysteresis in accordance with the present invention introduces hysteresis into the voltage comparison function in response to changes in an input signal voltage relative to a variable reference voltage. The reference voltage has one of two values depending upon the value of the input signal voltage, and is switched between the two values by sensing the current a flowing within one of the circuit branches of the differential amplifier that forms the voltage comparator. The sensed current is mirrored as a shunt current that is drawn away from the voltage divider used to generate the reference voltage.
A voltage comparator circuit with hysteresis in accordance with one embodiment of the present invention includes power terminals, an input signal terminal, first and second voltage divider circuits, an amplifier circuit and a current mirror circuit. The power terminals convey a power supply voltage, while the input signal terminal conveys an input signal. The first voltage divider circuit is coupled between the input signal terminal and the power terminals and provides a first bias voltage at the input signal terminal in response to reception of the power supply voltage. The input signal has opposing peak signal levels of opposite polarities relative to the bias voltage. The second voltage divider circuit is coupled between the power terminals and conducts a voltage divider current and thereby provides a second bias voltage in response to reception of the power supply voltage. The first and second bias voltages are unequal. The amplifier circuit is coupled between the power terminals, the input signal terminal and the second voltage divider circuit, and includes first and second circuit branches that alternately conduct first and second branch currents, respectively. The first amplifier circuit branch conducts the first branch current when a sum of the first bias voltage and the input signal has a first polarity and magnitude relative to the second bias voltage. The second amplifier circuit branch conducts the second branch current when the sum of the first bias voltage and the input signal has a second polarity and magnitude relative to the second bias voltage. The current mirror circuit is coupled between the amplifier circuit, the second voltage divider circuit and one of the power terminals. The current mirror circuit includes an input circuit branch that is coupled to the second amplifier circuit branch and conducts the second branch current upon reception thereof. The current mirror circuit also includes an output circuit branch that is coupled to the second voltage divider circuit and conducts a portion of the voltage divider current in response to conduction of the second branch current by the input circuit branch. This has the effect of causing the second bias voltage to have a first value when the first amplifier circuit branch conducts the first branch current and the second bias voltage to have a second value when the second amplifier circuit branch conducts the second branch current.
A method for performing a voltage comparison with hysteresis in accordance with another embodiment of the present invention includes the steps of:
receiving an input signal via an input signal terminal;
generating a first bias voltage at the input signal terminal, wherein the input signal has opposing peak signal levels of opposite polarities relative to the bias voltage;
conducting a voltage divider current and thereby generating a second bias voltage, wherein the first and second bias voltages are unequal;
alternately conducting first and second circuit branch currents by
conducting the first circuit branch cu
Dalla Valle Mark A.
National Semiconductor Corporation
Nguyen Long
Wildman Harrold Allen & Dixon
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