Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
1999-10-25
2001-02-20
Ton, My-Trang Nu (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S055000
Reexamination Certificate
active
06191624
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a voltage comparator for comparing a reference voltage with a comparison voltage using field effect transistors.
Conventionally, as a voltage comparator for comparing a reference voltage with a comparison voltage using field effect transistors (FETs), a positive feedback type voltage comparator as shown in
FIG. 7
has been proposed (e.g., Japanese Patent Laid-Open No. 7-154216). Referring to
FIG. 7
, a voltage comparator
201
is constructed by PMOS (P-channel Metal Oxide Semiconductor) field effect transistors T
52
to T
56
, NMOS (N-channel Metal Oxide Semiconductor) field effect transistor T
51
, and inverters I
51
to I
54
. The PMOS and NMOS field effect transistors will be simply referred to as “transistors” hereinafter unless otherwise specified.
The inverter I
51
is formed from an NMOS transistor T
61
and PMOS transistor T
62
. The inverter I
52
is formed from an NMOS transistor T
71
and PMOS transistor T
72
.
The power supply terminal of the inverter I
51
is connected to that of the inverter I
52
. The transistor T
51
is connected between the connection point of these power supply terminals and a power supply terminal
215
of a power supply voltage VDD. The ground terminal of the inverter I
51
is connected to that of the inverter I
52
. The transistor T
56
is connected between the connection point of these ground terminals and a ground terminal
216
of a ground voltage GND.
The output terminal of the inverter I
51
is connected to an input terminal A of the inverter I
52
. The output terminal of the inverter I
52
is connected to an input terminal B of the inverter I
51
. The inverters I
51
and I
52
construct a positive feedback circuit. The output terminal of the inverter I
52
corresponds to an output terminal Vout of the positive feedback type voltage comparator
201
.
The transistors T
52
and T
53
are series-connected between the input terminal A of the inverter I
52
and the ground terminal
216
. The gate of the transistor T
52
corresponds to an input terminal
211
of a comparison voltage Vin.
The transistors T
54
and T
55
are connected between the input terminal B of the inverter I
51
and the ground terminal
216
. The gate of the transistor T
54
corresponds to an input terminal
212
of a reference voltage Vref.
The input of the inverter I
53
is connected to the input terminal A of the inverter I
52
. The output of the inverter I
53
is connected to the gate of the transistor T
53
. The input of the inverter I
54
is connected to the input terminal B of the inverter I
51
. The output of the inverter I
54
is connected to the gate of the transistor T
55
.
In the voltage comparator
201
having such circuit arrangement, first, complementary control signals CLp and CLn are controlled to turn off the transistors T
51
and T
56
, respectively. No current flows to the transistors T
61
, T
62
, T
71
, and T
72
, and the input terminals A and B are in the floating state. In the comparison operation, potentials for turning on the transistors T
52
and T
54
are supplied to the comparison voltage Vin and reference voltage Vref. For this reason, the input terminals A and B are discharged to the ground voltage GND via the transistors T
52
, T
53
, T
54
, and T
55
.
Next, the complementary control signals CLp and CLn are controlled to turn on the transistors T
51
and T
56
, respectively. A current flows to the transistors T
61
, T
62
, T
71
, and T
72
, and the inverters I
51
and I
52
are rendered operative. This forms the positive feedback path of the positive feedback circuit comprising the inverters I
51
and I
52
.
Immediately after the positive feedback path is formed, both the input terminals A and B are at the ground potential GND. Of the input terminals A and B, one having a higher ON resistance for the transistor T
52
or T
54
is set at the power supply potential VDD, and the other having a lower ON resistance is set at the ground potential GND. When the transistors T
52
and T
54
are NMOS transistors, as shown in
FIG. 7
, the ON resistance is in inverse proportion to the gate voltage. The relationship in magnitude between the ON resistances is equivalent to that between the comparison voltage Vin and reference voltage Vref. Hence, the comparison voltage Vin and reference voltage Vref can be compared with each other.
If potentials due to the previous comparison operation remain at the input terminals A and B, the comparison voltage Vin or reference voltage Vref input for the next voltage comparison has an error, and accurate voltage comparison is impossible. To prevent this, when voltage comparison is to be continuously performed, the voltage comparator
201
turns off the transistors T
51
and T
56
by controlling the control signals CLp and CLn to sufficiently discharge the input terminals A and B to the ground potential GND and then starts the next voltage comparison.
In this case, when the transistors T
51
and T
56
are turned off, charges stored in the line capacitances of the input terminals A and B are removed via the transistors T
52
, T
53
, T
54
, and T
55
. However, the ON resistances of the transistors T
52
and T
54
change depending on the values of the comparison voltage Vin and reference voltage Vref. When the ON resistances are high to some extent, a long time is required to reduce the potentials at the input terminals A and B to the ground potential GND to prepare for the next comparison operation. Hence, the comparison operation cannot be repeated at a high speed.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above problem, and has as its object to provide a voltage comparator capable of continuously comparing a reference voltage and comparison voltage at a short time interval.
In order to achieve the above object, according to the present invention, there is provided a voltage comparator comprising a positive feedback circuit having first and second inverters each having an input terminal connected to an output terminal of the other inverter, the positive feedback circuit comparing a potential of an input terminal of the first inverter with a potential of an input terminal of the second inverter and outputting the comparison result from an output terminal of the second inverter, a first input circuit for supplying the first potential corresponding to an input comparison voltage to the input terminal of the second inverter, a second input circuit for supplying the second potential corresponding to an input reference voltage to the input terminal of the first inverter, a control circuit connected between a power supply terminal of the positive feedback circuit and a power supply terminal, the control circuit supplying a power supply voltage to the positive feedback circuit when an input control signal represents a comparison operation period to execute voltage comparison operation for comparing the first potential with the second potential by the positive feedback circuit, and stopping supplying the power supply voltage to set an initial state when the control signal represents an initialization period, a first reset circuit inserted between the input terminal of the second inverter and a ground terminal to reduce the first potential to a ground potential when the control signal represents the initialization period, and a second reset circuit inserted between the input terminal of the first inverter and the ground terminal to reduce the second potential to the ground potential when the control signal represents the initialization period.
REFERENCES:
patent: 5162681 (1992-11-01), Lee
patent: 5192878 (1993-03-01), Miyamoto et al.
patent: 5438287 (1995-08-01), Faue
patent: 5880617 (1999-03-01), Tanaka et al.
patent: 5949256 (1999-09-01), Zhang et al.
patent: 6008673 (1999-12-01), Glass et al.
patent: 7-154216 (1995-06-01), None
Blakely & Sokoloff, Taylor & Zafman
Nippon Telegraph and Telephone Corporation
Nu Ton My-Trang
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