Voltage clamp circuit with reduced I/O capacitance

Details Voltage clamp circuit with reduced I/O capacitance Voltage clamp circuit with reduced I/O capacitance

2007-10-09

2007-10-09

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S325000, C327S333000

Reexamination Certificate

active

11223270

ABSTRACT:
A voltage converter includes a first N-channel MOSFET transistor, an inverter, a plurality of serially-connected diodes and a second N-channel MOSFET transistor. The inverter is coupled to the gate of the first N-channel MOSFET transistor to turn on/off the voltage converter. The anode of the diodes is coupled to the source of the first N-channel MOSFET transistor and the cathode of the diodes are coupled to the drain of the second N-channel MOSFET transistor. Since the source of the second N-channel MOSFET transistor is ground, the voltage clamped at the source of the first N-channel MOSFET transistor is not higher than 3.4V when a high voltage applied to the gate of the second N-channel MOSFET transistor turns it on.

REFERENCES:
patent: 6577480 (2003-06-01), Avery et al.
patent: 6614633 (2003-09-01), Kohno
patent: 7046079 (2006-05-01), Van Blerkom et al.

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