Voltage boosting substrate bias generator

Details Voltage boosting substrate bias generator Voltage boosting substrate bias generator

1978-08-23

1980-10-21

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307200B, 307304, H03L 100, H03K 300

Patent

active

042296676

ABSTRACT:
An "on chip" substrate bias generator circuit to automatically compensate for threshold variations of devices that form a MOS circuit. The substrate bias generator includes a voltage doubler (or trippler) to develop a wide range of negative bias voltage to be fed back via the substrate to the MOS circuit to provide uniform bias control of the circuit devices.

REFERENCES:
patent: 3609414 (1971-09-01), Pleshko et al.
patent: 3805095 (1974-04-01), Lee et al.
patent: 3806741 (1974-04-01), Smith
patent: 4016476 (1977-04-01), Morokawa et al.
patent: 4049980 (1977-09-01), Maitland
patent: 4115710 (1978-09-01), Lou
patent: 4123671 (1978-10-01), Aihara et al.
patent: 4142114 (1979-02-01), Green
"Fast Mostek ROM", Electronics, pp. 42 & 42, 9/16/76.
Kubo et al., Proceedings of the 1976 IEEE Int'l. Solid State Circuits Conference, pp. 54-55; 2/18/76.
Blaser et al., Proceedings of the 1976 IEEE Int'l. Solid State Circuits Conf., pp. 56-57; 2/18/76.
Pashley et al., "Speedy RAM Runs Cool with Power-Down Circuitry", Electronics, pp. 103-107; 8/4/77.

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