Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2000-03-08
2003-04-29
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S537000, C307S110000, C363S060000
Reexamination Certificate
active
06556064
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to voltage booster circuits and voltage boosting methods which reduce the number of charge-accumulating devices required for a voltage boost and electronic units using the output of such a voltage booster circuit as a power source.
2. Description of Related Art
In liquid-crystal display apparatuses, for example, a high-voltage power source is required to drive liquid-crystal devices in order to obtain successful display characteristics. Therefore, a power-source circuit used in the liquid-crystal display apparatuses is configured such that an input voltage is boosted by a voltage booster circuit and the boosted voltage is supplied to a driving circuit for driving the liquid-crystal devices and to other circuits.
The configuration of a conventional voltage booster circuit will be described below for a case in which a voltage-boost magnification set to four is taken as an example.
FIG. 13
is a circuit diagram showing the configuration of a voltage booster circuit
138
in this case. The voltage booster circuit
138
is formed of transistors Q
1
to Q
8
, auxiliary capacitors C
1
, C
2
, and C
2
p, and an output capacitor Cout.
FIG. 14
is a timing chart of control signals sent to the voltage booster circuit
138
. A control signal “a” shown in this figure is generated by narrowing the pulse width of a control signal “b,” and is sent to n-channel transistors Q
2
, Q
4
, Q
6
, and Q
8
in the voltage booster circuit
138
as gate signals. A control signal “b” is supplied to p-channel transistors Q
1
, Q
3
, Q
5
and Q
7
of the voltage-booster circuit
138
as the gate signal.
When the control signals “a” and “b” are sent to the voltage booster circuit
138
, transistors Q
2
, Q
4
, Q
6
, and Q
8
are turned on whereas the other transistors are turned off in a period indicated by {circle around (
1
)} in
FIG. 14
, that is, a period in which only the control signal “a” has an “H” level. Therefore, the auxiliary capacitor C
1
is charged with an input voltage Vin since a terminal C
1
H is connected to the supply line of the input voltage Vin and a terminal C
1
L is connected to the ground line, as shown in {circle around (
1
)} of FIG.
15
. The auxiliary capacitor C
2
is connected in parallel to the auxiliary capacitor C
2
p charged with 2 Vin, in a period indicated by {circle around (
2
)}, and is charged. After these operations, all the transistors Q
1
to Q
8
are turned off temporarily.
In a period indicated by {circle around (
2
)} in
FIG. 14
, that is, a period in which both control signals “a” and “b” have an “L” level, transistors Q
1
, Q
3
, Q
5
, and Q
7
are turned on whereas the other transistors are turned off. Therefore, as shown in {circle around (
2
)} of
FIG. 15
, since the terminal C
1
L of the auxiliary capacitor C
1
is switched and connected to the supply line of the input voltage Vin and the terminal C
1
H is disconnected from the supply line of the input voltage Vin, the potential of the terminal C
1
H becomes 2 Vin, which is offset from the input voltage Vin to a higher potential by the output voltage Vin of the auxiliary capacitor C
1
. On the other hand, since a terminal C
2
pH of the auxiliary capacitor C
2
p is connected to the terminal C
1
H, the auxiliary capacitor C
2
p is charged with a potential difference of 2 Vin. Therefore, the potential of the terminal C
2
pH becomes 2 Vin in the period ‡A. In addition, since the terminal C
1
H is connected to a terminal C
2
L of the auxiliary capacitor C
2
, which has been charged with 2 Vin in the period ‡A, the potential of the terminal C
2
H of the auxiliary capacitor C
2
becomes 4 Vin, which is offset from the potential of the terminal C
1
H (C
2
pH, C
2
L), 2 Vin, to a higher potential by the output voltage 2 Vin of the auxiliary capacitor C
2
. And then, the potential is smoothed by the output capacitor Cout. With the periods {circle around (
1
)} and {circle around (
2
)} being repeated in this way, the input voltage Vin is boosted four times and outputted.
To increase the voltage-boost magnification, for example, to set the voltage-boost magnification to 16, seven auxiliary capacitors C
1
, C
2
, C
2
p, C
3
, C
3
p, C
4
, and C
4
p are used, as shown in FIG.
16
. As shown in {circle around (
1
)} of the figure, the auxiliary capacitor C
1
is charged with an input voltage Vin, the auxiliary capacitor C
2
is connected in parallel to the auxiliary capacitor C
2
p which has been charged with 2 Vin in {circle around (
2
)} and is charged, the auxiliary capacitor C
3
is connected in parallel to the auxiliary capacitor C
3
p which has been charged with 4 Vin in {circle around (
2
)} and is charged in the same way, and the auxiliary capacitor C
4
is connected in parallel to the auxiliary capacitor C
4
p which has been charged with 8 Vin in {circle around (
2
)} and is charged in the same way.
As shown in {circle around (
2
)} of the figure, the auxiliary capacitor C
2
p is first charged with 2 Vin, which is offset from the input voltage Vin to a higher potential by the output voltage Vin of the auxiliary capacitor C
1
; secondly, the auxiliary capacitor C
3
p is charged with 4 Vin, which is offset from a potential of 2 Vin caused by the auxiliary capacitor C
1
to a higher potential by the output voltage 2 Vin of the auxiliary capacitor C
2
; thirdly, the auxiliary capacitor C
4
p is charged with 8 Vin, which is offset from a potential of 4 Vin caused by the auxiliary capacitor C
2
to a higher potential by the output voltage 4 Vin of the auxiliary capacitor C
3
; and fourthly, a potential of 16 Vin, which is 16 times the input voltage Vin, is obtained by offsetting a potential of 8 Vin caused by the auxiliary capacitor C
3
to a higher potential by the output voltage 8 Vin of the auxiliary capacitor C
4
.
In the conventional voltage booster circuit, however, if the smoothing capacitor Cout is excluded, three capacitors are required for a four-times voltage boost and seven capacitors are required for a 16-times voltage boost. Generally, (2n−1) capacitors are required for a 2n-times voltage boost. When a power-source circuit including a voltage booster circuit is integrated, it is difficult to form capacitive circuits such as capacitors on a semiconductor substrate. Even if such a capacitive circuit can be formed, since it makes the circuit size larger, the number of capacitors required for a voltage boost needs to be reduced as much as possible.
The largest problem in the conventional voltage booster circuit is that it is difficult to control the voltage-boost magnification as required. Therefore, to make the boosted voltage constant at the desired voltage value, a separate constant-voltage circuit such as a switching regulator is required at a later stage in the voltage booster circuit, and accordingly, the scale of the power-source circuit becomes large.
SUMMARY OF THE INVENTION
The present invention provides a voltage booster circuit and a voltage boosting method which allow the number of charge-accumulating devices required for a voltage boost, such as capacitors, to be reduced to simplify the configuration and which allow the voltage-boost magnification to be controlled relatively freely. The invention also provides an electronic unit using the output of the voltage booster circuit as a power source.
To achieve the foregoing, a voltage booster circuit according to the present invention may include a first connector for connecting one terminal of a first charge-accumulating device to a first line having a predetermined potential and for connecting the other terminal of the first charge-accumulating device to a second line having a potential different from that of the first line, a second connector for connecting one terminal of a second charge-accumulating device to the first line, and for switching and connecting the one terminal of the first charge-accumulating device to the second line and for switching and connecting the other terminal of the first charge-accumulating device to the other terminal of the se
Callahan Timothy P.
Englund Terry L.
Oliff & Berridg,e PLC
Seiko Epson Corporation
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