Voltage booster circuit

Details Voltage booster circuit Voltage booster circuit

1995-04-19

1997-06-03

Wong, Peter S.

Electric power conversion systems

Current conversion

With voltage multiplication means

327536, 307110, H02M 318

Patent

active

056361157

ABSTRACT:
A voltage booster circuit using at least one capacitor. This capacitor receives a clock signal at one terminal, and a second terminal of the capacitor is connected, firstly, to a supply terminal by means of a precharging transistor and, secondly, to an output by means of an insulation transistor. The disclosed device includes control circuits for controlling the transistors such that they are not on at the same time and such that the voltages that control them are greater than the highest potential present at their source or at their drain.

REFERENCES:
patent: 4621315 (1986-11-01), Vaughn et al.
patent: 4794278 (1988-12-01), Vajdic
patent: 5003197 (1991-03-01), Nojima et al.
patent: 5038325 (1991-08-01), Douglas et al.
patent: 5367489 (1994-11-01), Park et al.
IEEE Journal of Solid State Circuits, vol. 26, No. 4, Apr. 1991, pp. 465-472, Nakakome, et al., "An Experimental 1.5-V 64Mbit DRAM".
IEEE Journal of Solid-State Circuits, vol. 18, No. 5, Oct. 1983, New York, US pp. 452-456, Nakano et al., "A Sub-100NS 256K Dram With Open Bit Line Scheme".
IEEE International Solid State Circuits Conference, vol. 34, Feb. 1991, New York, US, pp. 268-269 Sato et al., "A 4MB Pseudo SRAM Operating At 2.6 +/-1V With 3MUAMPERE Data Retention Current".

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