Voice coding and decoding system

Data processing: speech signal processing – linguistics – language – Speech signal processing – For storage or transmission

Reexamination Certificate

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Details

C704S219000, C704S220000, C704S222000

Reexamination Certificate

active

06208957

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a voice coding system and a decoding system based on hierarchical coding.
2. Description of the Related Art
Conventionally, a voice coding and decoding system based on hierarchical coding, in which a sampling frequency of a reproduction signal is variable depending upon a bit rate to be decoded, has been employed intending to make it possible to decode a voice signal with relatively high quality while band width is narrow, even when a part of packet drops out upon transmitting the voice signal on a packet communication network. For example, in Japanese Unexamined Patent Publication No. Heisei 8-263096 (hereinafter referred to as “publication 1”), there has been proposed a coding method and a decoding method for effecting hierarchical coding of an acoustic signal by band division. In this coding method, upon realization of hierarchical coding with N hierarchies, a signal consisted of a low band component of an input signal is coded in a first hierarchy, a differential signal derived by subtracting n−1 in number of signals coded and decoded up to the (n−1)th hierarchy from a signal consisted of a component of the input signal having wider band than the (n−1)th hierarchy, in the (n)th hierarchy (n=2, . . . , N−1) is coded. In the (N)th hierarchy, a differential signal derived by subtracting N−1 in number of signals coded and decoded up to the (N−1)th hierarchy from the input signal, is coded.
Referring to
FIG. 12
, operation of the voice coding and decoding system employing a Code Excited Linear Predictive (CELP) coding method in coding each hierarchy, will be discussed. For simplification of disclosure, the discussion will be given for the case where number of hierarchies is two. Similar discussion will be given with respect to three or more hierarchies. In
FIG. 12
, there is illustrated a construction, in which a bit stream coded by a voice coding system can be decoded by two kinds of bit rates (hereinafter referred to as high bit rate and low bit rate) in a voice decoding system. It should be noted that
FIG. 12
has been prepared by the inventors as a technology relevant to the present invention on the basis of the foregoing publication and publications identified later.
Referring to
FIG. 12
, discussion will be given with respect to the voice coding system. A down-sampling circuit
1
down-samples (e.g. converts a sampling frequency from 16 kHz to 8 kHz) an input signal to generate a first input signal and output to a first CELP coding circuit
2
. Here, the operation of the down-sampling circuit
1
has been discussed in P. P. Vaidyanathan, “Multirate Systems and Filter Banks”, Chapter 4.1.1 (FIG.
4
.
1
-
7
) (hereinafter referred to as publication 2). Since reference can be made to the disclosure of the publication 2, discussion will be neglected.
The first CELP coding circuit
2
performs a linear predictive analysis of the first input signal per every predetermined frames to derive a linear predictive coefficient expressing spectrum envelop characteristics of a voice signal and encodes an excitation signal of a corresponding linear predictive synthesizing filter and the derived linear predictive coefficient, respectively. Here, the excitation signal is consisted of a frequency component indicative of a pitch frequency, a remaining residual component and gains thereof. The frequency component indicative of the pitch frequency is expressed by an adaptive code vector stored in a code book storing past excitation signals, called as an adaptive code book. The foregoing residual component is expressed as a multipulse signal disclosed in J-P. Adoul et al. “Fast CELP Coding Based on Algebraic Codes” (Proc. ICASSP, pp. 1957-1960, 1987) (hereinafter referred to as “publication 3”).
By weighted summing of the foregoing adaptive code vector and the multipulse signal with a gain stored in the gain code book, the excitation signal is generated.
A reproduced signal can be synthesized by driving the foregoing linear predictive synthesizing filter by the foregoing excitation signal. Here, selection of the adaptive code vector, the multipulse signal and the gain is performed to make an error power minimum with audibility weighting of an error signal between the reproduced signal and the first input signal. Then, an index corresponding to the adaptive code vector, the multipulse signal, the gain and the linear predictive coefficient is output to a first CELP decoding circuit
3
and a multiplexer
7
.
In the first CELP decoding circuit
3
, with taking the index corresponding to the adaptive code vector, the multipulse signal, the gain and the linear predictive coefficient as input, decoding is performed, respectively. By weighted summing of the adaptive code vector and the multipulse signal weighted by the gain, the excitation signal is derived. By driving the linear predictive synthesizing filter by the excitation signal, the reproduced signal is generated. Also, the reproduced signal is output by an up-sampling circuit
4
.
The up-sampling circuit
4
generates a signal by up-sampling (e.g. converted the sampling frequency from 8 kHz to 16 kHz) the reproduced signal to output to a differential circuit
5
. Here, with respect to the up-sampling circuit
4
, since reference can be made to Chapter 4.1.1 (FIG.
4
.
1
-
8
), discussion will be neglected.
The differential circuit
5
generates a differential signal of the input signal and the up-sampled reproduction signal and outputs it to a second CELP coding circuit
6
.
The second CELP coding circuit
6
effects coding of the input differential signal similarly to the first CELP coding circuit
2
. The index corresponding to the adaptive code vector, the multipulse signal, the gain and the linear predictive coefficient is output to the multiplexer
7
. The multiplexer
7
outputs the four kinds of indexes input from the first CELP coding circuit
2
and the four kinds of indexes input from the second CELP coding circuit
6
with converting into the bit stream.
Next, discussion will be given hereinafter with respect to the voice decoding system. The voice decoding system switches operation by a demultiplexer
8
and a switch circuit
13
depending a control signal identifying two kinds of bit rates capable of decoding operation.
The demultiplexer
8
inputs the bit stream and the control signal. When the control signal indicates the high bit rate, the four kinds of indexes coded in the first CELP coding circuit
2
and the four kinds of indexes coded by the second CELP coding circuit
6
are extracted to output to a first CELP decoding circuit
9
and a second CELP decoding circuit
10
, respectively. On the other hand, when the control signal indicates low bit rate, the four kinds of indexes coded in the first CELP coding circuit
2
is extracted to output only to the first CELP decoding circuit
9
.
The first CELP decoding circuit
9
decodes respective of the adaptive code vector, the multipulse signal, the gain and the linear predictive coefficient from the four kinds of indexes input, by the same operation as the first decoding circuit
3
to generate the first reproduced signal to output to the switch circuit
13
.
In the up-sampling circuit
11
, the first reproduced signal input via the switch circuit
13
up-samples similarly to the up-sampling circuit
4
to output the up-sampled first reproduced signal to the adder circuit
12
.
The second CELP decoding circuit
10
decodes respective of the adaptive code vector, the multipulse signal, the gain and the linear predictive coefficient from the input four kinds of indexes to generate the reproduced signal to output to the adder circuit
12
.
The adder circuit
12
adds the input reproduced signal and the first reproduced signal up-sampled by the up-sampling circuit
11
to output to the switch circuit
13
as a second reproduced signal.
The switch circuit
13
inputs the first reproduced signal, the second reproduced signal and the control signal. Wh

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