VMOS transistor

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357 22, 357 23, 357 55, 357 56, H01L 2348, H01L 2944, H01L 2952

Patent

active

040706907

ABSTRACT:
An improved high power vertical MOS transistor is disclosed. The channel region of the transistor is electrically connected to the source terminal. The active region of the transistor comprises a plurality of finger-like mesas extending at approximately right angles from a second palm-like mesa. The finger-like mesas form the active regions of the transistor with the palm-like mesa serving as a support for the source bonding pad. Thin metallic stripes extend along the edges of the finger-like mesas to form the gate of the transistor. A metallic layer contacts the gate and extends up at least one edge and along the top of a substantially rectangular mesa. The finger-like, palm-like and rectangular mesas are supported by a common substrate. The portion of the metallic layer overlying the top of the rectangular mesa serves as the gate bonding pad. Electrical contact to the drain region of the transistor is made through the supporting substrate. A metallic layer which contacts the source region extends along the top of each of the finger-like mesas onto the top of the palm-like mesa. The portion of this layer which overlies the palm-like mesa serves as the source bonding pad. The top surface of the gate and source bonding pads are in substantially the same plane and comprise the highest points on the surface of the device.

REFERENCES:
patent: 3761785 (1973-09-01), Pruniaux
patent: 3823352 (1974-07-01), Pruniaux et al.
patent: 3851379 (1974-12-01), Gutknecht et al.
patent: 3893155 (1975-07-01), Ogiue
patent: 3975221 (1976-08-01), Rodgers
VMOS High-Speed TTL Compatible MOS Logic; by Rodgers et al., IEEE Journal of Solid State Circuits; vol. SC9, No. 5, Oct. 1974, pp. 230-250.
High Speed Epitaxial Field-Effect Devices; by Magda, vol. 14, No. 3, Aug. 1971, IBM Technical Disclosure Bulletin, p. 751.
High Speed Field-Effect Structure; IBM Technical Disclosure Bulletin, by Drangeid; vol. 11, No. 3, Aug. 1968, pp. 332-333.
IBM Technical Disclosure Bulletin, vol. 10, No. 5, Oct. 1967, pp. 653-654, by Terman et al.

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