VMOS-FET IMPATT diode pulse bias circuit

Details VMOS-FET IMPATT diode pulse bias circuit VMOS-FET IMPATT diode pulse bias circuit

1982-06-01

1984-10-09

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307296R, 307297, 307318, 361 91, H03K 326, H03K 301

Patent

active

044764022

ABSTRACT:
This invention describes a VMOS-FET, IMPATT diode pulse bias circuit desid to provide a Gallium Arsenide IMPATT diode with a specified operating voltage and current under required conditions to generate an RF pulse.

REFERENCES:
patent: 3612914 (1971-10-01), Evans
patent: 4251742 (1981-02-01), Beelitz

Affiliated with

Also associated with

Rating

VMOS-FET IMPATT diode pulse bias circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with VMOS-FET IMPATT diode pulse bias circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and VMOS-FET IMPATT diode pulse bias circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1603242