VLSI single-chip (255,223) Reed-Solomon encoder with interleaver

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371 381, 371 391, 371 41, 371 43, G06F 1108

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049072331

ABSTRACT:
A concatenated coding system consisting of a (255,223) Reed-Solomon outer code and a convolutional inner code is provided with either a block of preinterleaved frames or an interleaver of frames in a block of data symbols to be coded in the outer decoder. By interleaving, errors are constrained to occur in only one symbol in a frame, which can be corrected by the Reed-Solomon outer decoder. After transmission and inner decoding, the data symbols are deinterleaved for outer decoding. Instead of preinterleaving at the source, or interleaving before inner encoding, the frames of data symbols may be interleaved at the receiver after inner decoding and then combined with the inner decoded check symbols for outer decoding. The outer encoder is a bit-serial Reed-Solomon encoder with programmable interleaving, and the inner decoder is a Viterbi decoder.

REFERENCES:
patent: 3831143 (1974-08-01), Trafton
patent: 3988677 (1976-10-01), Rice et al.
patent: 4162480 (1979-07-01), Berlekamp
patent: 4410989 (1983-10-01), Berlekamp
patent: 4649541 (1987-03-01), Lahmeyer
Odenwalder, Joseph P., "Concatenated Reed-Solomon/Viterbi Channel Coding for Advanced Planetary Missions: Analysis, Simulations, and Tests", Jet Propulsion Laboratory, Dec. 1, 1974.
IEEE Communications Magazine, Berlekamp, E., et al, "The Application of Error Control to Communications", vol. 25, No. 4, Apr. 1987, pp. 44-57.
Lin et al., "Error Control Coding", Prentice Hall, Inc., pub., 1983, pp. 271-272, 535-538.
R. L. Miller, L. J. Deutsch and S. A. Butman, "On the Error Statistics of Viterbi Decoding and the Performance of Concatenated Codes," Jet Propulsion Laboratory, Pasadena, California, Sep. 1, 1981.
R. F. Rice, "End-to-End Image Information Rate Advantages of Various Alternative Communication Systems," Publication 82-61, Jet Propulsion Laboratory, Pasadena, California, Sep. 1, 1982.
E. R. Berlekamp, "Bit-Serial Reed-Solomon Encoders," IEEE Trans. Inform. Theory, vol. IT-28, No. 6, pp. 869-874, Nov. 1982.
I. S. Hsu, I. S. Reed, T. K. Truong, K. Wang, C. S. Yeh and L. J. Deutsch, "The VLSI Implementation of a Reed-Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm", IEEE Trans. on Computers, vol. C-33, No. 10, Oct. 1984.

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