VLSI hot-spot minimization using nanotubes

Details VLSI hot-spot minimization using nanotubes VLSI hot-spot minimization using nanotubes

2008-07-08

2010-11-30

Everhart, Caridad M (Department: 2895)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S677000, C257SE21153, C257SE21499

Reexamination Certificate

active

07842554

ABSTRACT:
The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area. The heat conductivity of the nanotubes is greater than the heat conductivity of the matrix material, with the distal ends of the nanotubes exposed to present a distal surface comprising the first heat conducting means for direct contact with a medium comprising a cooling fluid. The inventors also disclose processes for manufacturing and using the device and products produced by the processes.

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