VLSI binary updown counter

Details VLSI binary updown counter VLSI binary updown counter

1988-01-13

1989-07-04

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Pulse counting or dividing chains

Using bistable regenerative trigger circuits

377111, 377114, 377116, 377126, 377 69, 377 79, 307471, 307481, H03K 2356, H03K 2116

Patent

active

048457280

ABSTRACT:
A pipeline binary updown counter is comprised of simple stages that may be readily replicated. Each stage is defined by the Boolean logic equation

REFERENCES:
patent: 3544773 (1970-12-01), Peddie
patent: 3564218 (1971-12-01), Lay
patent: 3588475 (1971-06-01), Scott
patent: 3632997 (1972-01-01), Froemke
patent: 4214173 (1980-07-01), Popper
patent: 4418418 (1983-11-01), Aoki
patent: 4509183 (1985-04-01), Wright
patent: 4513432 (1985-04-01), Gulati
patent: 4611337 (1986-09-01), Evans
patent: 4637038 (1987-01-01), Boyle
patent: 4741006 (1988-04-01), Yamaguchi et al.

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