VLC decoder with sign bit masking

Details VLC decoder with sign bit masking VLC decoder with sign bit masking

1995-11-08

1997-09-02

Williams, Howard L.

Coded data generation or conversion

Digital code to digital code converters

To or from variable length codes

H03M 740

Patent

active

056637250

ABSTRACT:
The present invention relates to a parallel variable length decoder and a method for decoding a signed variable length code word. Variable length decoding (VLD) is a widely-used method in data compression, especially, in the applications of image data communication and storage. Many international standards have adopted this technique in video data compression, for example, JPEG, MPEG, CCITT H.261 and so on. Two programmable logic arrays (PLAs) are used in conventional VLD which differ only in there sign. The present invention uses a single PLA which is triggered by bits of signed fixed length inputs, not including a sign bit. The PLA output an unsigned run-level pair. The VLD processes the sign bit outside the PLA. A mask circuit is used to extract the sign bit which is then combined with the decoded unsigned run-level pair to get a signed run-level pair.

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