Viterbi decoder with reduced number of data move operations

Details Viterbi decoder with reduced number of data move operations Viterbi decoder with reduced number of data move operations

1987-01-28

1988-05-31

Atkinson, Charles E.

Excavating

371 43, 375 17, 375 39, G06F 1110, H04L 100

Patent

active

047486260

ABSTRACT:
Disclosed is a modem including a transmitter having a convolutional encoder for transforming each time unit digital data into an expanded bit sequence having symbol-selecting bits and subset-selecting bits, the transmitter further providing modulation of a carrier signal and a receiver wherein a Viterbi decoder determines the maximum likelihood path through a trellis from a plurality of surviving paths using a wraparound memory wherein in each addressable location indexed to a current state of a surviving path there is stored a previous state of that surviving path.

REFERENCES:
patent: 4240156 (1980-12-01), Doland
patent: 4581601 (1986-04-01), Calderbank et al.
patent: 4583236 (1986-04-01), Kromer et al.
patent: 4586182 (1986-04-01), Gallager
patent: 4601044 (1986-07-01), Kromer, III et al.
patent: 4606027 (1986-08-01), Otani
patent: 4630032 (1986-12-01), Gordon et al.
patent: 4631735 (1986-12-01), Qureshi
patent: 4710746 (1987-12-01), Shimoda
G. David Forney, Jr., "The Viterbi Algorithm", IEEE, vol. 61, No. 3, Mar. 1973, pp. 268-278.

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