Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
2006-05-09
2006-05-09
Ghayour, Mohammad (Department: 2631)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C714S795000
Reexamination Certificate
active
07042964
ABSTRACT:
A Viterbi decoder includes a number of classical Add-Compare-Select units and a number of further Add-Compare-Select unit having a lower complexity butterfly unit (300) having only two adder means, such that the further Add-Compare-Select unit has a butterfly unit (300) comprising: first adder means (310) for receiving a first path metric and a branch metric and for producing at its output the addition thereof; and second adder means (320) for receiving a second path metric and said branch metric and for producing at its output the addition thereof. First comparator means (330) are coupled to receive the output of the second adder means and coupled to receive the first path metric for comparing therebetween. Second comparator means (340) are coupled to receive the output of the first adder means and coupled to receive the second path metric for comparing therebetween. First selection means (350) for selecting between the second adder means output and the first path metric produce a first survivor path metric in dependence on the first comparator means comparison. Second selection means (360) for selecting between the first adder means output and the second path metric signal produce a second survivor path metric in dependence on the second comparator means comparison. Only two adder means are used for processing metric transitions as a second branch metric is identified as having a value of zero.
REFERENCES:
patent: 5291499 (1994-03-01), Behrens et al.
patent: 5327440 (1994-07-01), Fredrickson et al.
patent: 5414738 (1995-05-01), Bienz
patent: 5530707 (1996-06-01), Lin
patent: 5742621 (1998-04-01), Amon et al.
patent: 5815515 (1998-09-01), Dabiri
patent: 5928378 (1999-07-01), Choi
patent: 5970097 (1999-10-01), Ishikawa et al.
patent: 6163581 (2000-12-01), Kang
patent: 6334202 (2001-12-01), Pielmeier
patent: 6553541 (2003-04-01), Nikolic et al.
patent: 6697443 (2004-02-01), Kim et al.
patent: 2001/0007142 (2001-07-01), Hocevar et al.
patent: 2 769 434 (1999-04-01), None
Syed Shahzad, Saqih Yaqub, and Faiseal Suleman, Chameleon Logics; “Self Correcting Codes Conquer Noise—Part One: Viterbi Codecs” Feb. 15, 2001; EDN Magazine; pp. 131-140.
European Search Report dated Mar. 6, 2001 (3 pgs.).
Hekmann Ralf
Muck Markus
Flanagan Krista M.
Freescale Semiconductor Inc.
Ghayour Mohammad
LandOfFree
Viterbi decoder, method and unit therefor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Viterbi decoder, method and unit therefor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Viterbi decoder, method and unit therefor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3565723