Viterbi decoder and method using sequential two-way...

Details Viterbi decoder and method using sequential two-way... Viterbi decoder and method using sequential two-way...

2006-03-28

2006-03-28

Bocure, Tesfaldet (Department: 2631)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C714S795000, C714S796000

Reexamination Certificate

active

07020223

ABSTRACT:
In a Viterbi decoder, 2n-way add-compare-select (ACS) operations are performed by sequential and/or parallel two-way ACS operations. In one embodiment, first two-way ACS operations generate an interim path metric for each of a plurality of interim states. Second two-way ACS operations generate a path metric for each of a plurality of next states. This process may be repeating for subsequent groups of bits to generate branch transitions through a trellis. A path having a lowest path metric may be selected and a decoded bit sequence determined based on the selected path. In generating the decoded bit sequence, the interim states of the selected path do not have to be used for code rates k
when k is two or greater. The interim states may be used for code rates k
when k=1.

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