Visual inspection and verification system

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S030000, C716S030000

Reexamination Certificate

active

06757645

ABSTRACT:

THE BACKGROUND OF THE INVENTION
a. The Field of the Invention
This invention relates to the field of integrated circuit manufacturing. In particular, the invention relates to a system for inspection of defects on masks used in the manufacture of integrated circuits.
b. Description of Related Art
In designing an integrated circuit (IC), engineers typically rely upon computer simulation tools to help create a circuit schematic design consisting of individual devices coupled together to perform a certain function. To actually fabricate this circuit in a semiconductor substrate the circuit must be translated into a physical representation, or layout, which itself can then be transferred onto a template (i.e., mask), and then to the silicon surface. Again, computer aided design (CAD) tools assist layout designers in the task of translating the discrete circuit elements into shapes which will embody the devices themselves in the completed IC. These shapes make up the individual components of the circuit, such as gate electrodes, field oxidation regions, diffusion regions, metal interconnections, and so on.
Once the layout of the circuit has been created, the next step to manufacturing the integrated circuit (IC) is to transfer the layout onto a semiconductor substrate. One way to do this is to use the process of optical lithography in which the layout is first transferred onto a physical template which is in turn used to optically project the layout onto a silicon wafer.
In transferring the layout to a physical template, a mask (usually a quartz plate coated with chrome) is generally created for each layer of the integrated circuit design. This is done by inputting the data representing the layout design for that layer into a device such as an electron beam machine which writes the integrated circuit layout pattern into the mask material. In less complicated and dense integrated circuits, each mask comprises the geometric shapes which represent the desired circuit pattern for its corresponding layer. In more complicated and dense circuits in which the size of the circuit features approach the optical limits of the lithography process, the masks may also comprise optical proximity correction features such as serifs, hammerheads, bias and assist bars which are sublithographic sized features designed to compensate for proximity effects. In other advanced circuit designs, phase shifting masks may be used to circumvent certain basic optical limitations of the process by enhancing the contrast of the optical lithography process.
These masks are then used to optically projected the layout onto a silicon wafer coated with photoresist material. For each layer of the design, a light is shone on the mask corresponding to that layer via a visible light source or an ultra-violet light source. This light passes through the clear regions of the mask, whose image exposes the underlying photoresist layer, and is blocked by the opaque regions of the mask, leaving that underlying portion of the photoresist layer unexposed. The exposed photoresist layer is then developed, typically through chemical removal of the exposed
on-exposed regions of the photoresist layer. The end result is a semiconductor wafer coated with a photoresist layer exhibiting a desired pattern which defines the geometries, features, lines and shapes of that layer. This process is then repeated for each layer of the design.
As integrated circuit designs become more complicated, it becomes increasingly important that the masks used in photolithography are accurate representations of the original design layout. It is, unfortunately, unrealistic to assume that the electron beam and other machines used to manufacture these masks can do so without error. In the typical manufacturing process, some mask defects do occur outside the controlled process.
A defect on a mask is anything that is different from the design database and is deemed intolerable by an inspection tool or an inspection engineer. FIGS.
1
(
a
)-(
f
), illustrate a mask
100
representing a simple integrated circuit design which contains some of the common mask defects that occur during the mask manufacturing process. The mask
100
comprises an opaque area
105
, typically made of chrome, and clear areas
110
and
120
which represent the geometry primitives to be transferred onto the photoresist layer, and typically made of quartz. FIG.
1
(
a
) illustrates an isolated pinhole defect
125
in the opaque area
105
of the mask
100
. FIG.
1
(
b
) illustrates an isolated opaque spot defect
130
in the clear area
110
of the mask
100
. FIG.
1
(
c
) illustrates edge intrusion defects
140
in the clear areas
110
and
120
of the mask
100
. FIG.
1
(
d
) illustrates edge protrusion defects
145
in the opaque area
105
of the mask
100
. FIG.
1
(
e
) illustrates a geometry break defect
150
in the clear area
110
of the mask
100
. Finally, FIG.
1
(
f
) illustrates a geometry bridge defect
155
in the opaque area
105
of the mask
100
.
FIGS.
2
(
a
)-(
b
) illustrate possible defects which may occur on a mask which utilizes optical proximity correction features. FIG.
2
(
a
) illustrates a simple desired mask design
200
consisting of an opaque area
205
, a clear area
210
which represents the shape desired to be transferred to the photoresist, and design serifs
215
which are added to the design to correct for optical proximity effects. FIG.
2
(
b
) illustrates the mask
220
which could be produced by a typical electron beam machine given the mask design
200
as an input. The mask
220
comprises an opaque area
225
, a clear area
230
, and modified serifs
235
. Note that the shape of the modified serifs
235
is different than the shape of the design serifs
215
. This is because the size of the serifs is very small—they are designed to be smaller than the optical resolution of the lithography process to be used—and the electron beam typically can not perfectly reproduce the design serif
215
shape onto the mask material. The result would be similar for masks which utilize other optical proximity correction features such as hammerheads, bias bars and assist bars.
One typical method of inspecting a mask for defects such as those illustrated in
FIGS. 1 and 2
is illustrated in the flowchart of FIG.
3
. After designing an integrated circuit
300
and creating a data file of mask design data
310
, the mask design data is provided to a device such as an electron beam or laser writing machine and a mask is manufactured
315
. The mask is then inspected for defects as shown at process block
320
. The inspection may, for instance, be carried out by scanning the surface of the mask with a high resolution microscope (e.g., optical, scanning electron, focus ion beam, atomic force, and near-field optical microscopes) and capturing images of the mask. These mask images may then be observed by engineers off-line or mask fabrication workers online to identify defects on the physical mask. The next step, shown as decision block
325
, is determining whether or not the inspected mask is good enough for use in the lithography process. This step can be performed offline by a skilled inspection engineer, or by fabrication workers online possibly with the aid of inspection software. If there are no defects, or defects are discovered but determined to be within tolerances set by the manufacturer or end-user, then the mask is passed and used to expose a wafer as shown at process block
340
. If defects are discovered that fall outside tolerances, then the mask fails the inspection
325
, and a decision
330
must be made as to whether the mask may be cleaned and/or repaired to correct the defects
335
, or whether the defects are so severe that a new mask must be manufactured
315
. This process is continued until a manufactured mask passes the inspection
325
.
Once a physical mask is produced which passes the inspection, it is important to further inspect the mask to ensure that the mask will produce the desired image on a photoresist after a wafer is exposed to

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Visual inspection and verification system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Visual inspection and verification system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Visual inspection and verification system will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3349505

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.