Virtual reassembly system and method of operation thereof

Multiplex communications – Pathfinding or routing – Through a circuit switch

Reexamination Certificate

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Details

C370S392000, C370S395520, C370S474000

Reexamination Certificate

active

06850516

ABSTRACT:
A virtual reassembly system for use with a fast pattern processor and a method of operating the same. In one embodiment, the virtual reassembly system includes a first pass subsystem configured to convert a packet of a protocol data unit into at least one processing block, queue the at least one processing block based upon a header of the packet and determine if the packet is a last packet of the protocol data unit. The virtual reassembly system further includes a second pass subsystem configured to virtually reassemble the protocol data unit by retrieving the at least one processing block based upon the queue.

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patent: 6259699 (2001-07-01), Opalka et al.
patent: 6711153 (2004-03-01), Hebb et al.
patent: 6721316 (2004-04-01), Epps et al.

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