Virtual phase charge transfer device

Details Virtual phase charge transfer device Virtual phase charge transfer device

1978-05-16

1980-10-21

Munson, Gene M.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 91, 307221D, H01L 2978, G11C 1928

Patent

active

042297524

ABSTRACT:
A uniphase, buried-channel, semiconductor charge transfer device wherein a portion of each cell includes an inversion layer, or "virtual electrode" at the semiconductor surface, shielding that region from any gate-induced change in potential. Each cell is comprised of four regions (I, II, III, IV) wherein the characteristic impurity profile of each region determines the maximum potential generated therein for the gate "on" and gate "off" conditions. Clocking the gate causes the potential maxima in regions I and II to cycle above and below the fixed potential maxima in regions III and IV beneath the virtual electrode. Directionality of charge transfer is thereby achieved, since the potential maximum for region II (.phi..sub.max II) remains greater than for region I (.phi..sub.max I) and .phi..sub.max IV>.phi..sub.max III, for both gate conditions. A self-aligned process for fabrication is provided, including a number of ion implant stages to fix the required impurity profiles in each cell for generating the correct potential profiles for charge propagation. CCD imagers, memory devices, an analog processors are contemplated systems wherein the invention is to be implemented.

REFERENCES:
patent: 3796932 (1974-03-01), Amelio et al.
patent: 3918997 (1975-11-01), Mohsen et al.
patent: 4012759 (1977-03-01), Esser
patent: 4028716 (1977-06-01), van Santen et al.
patent: 4035906 (1977-07-01), Tasch et al.
patent: 4047215 (1977-09-01), Frye et al.
patent: 4065847 (1978-01-01), Borel et al.

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