Virtual ground read only memory circuit

Details Virtual ground read only memory circuit Virtual ground read only memory circuit

1996-05-22

1998-03-31

Yoo, Do Hyun

Static information storage and retrieval

Read only systems

Semiconductive

365 51, 365 63, G11C 700

Patent

active

057346020

ABSTRACT:
A semiconductor read only memory device includes memory cells arranged in a matrix of rows and columns; word lines crossing the matrix, wherein one word line is connected to each row of memory cells; and bit lines interdigitated with column lines and positioned such that each column of memory cells is between a bit line and a column line. The matrix is subdivided into cells, where each cell has four memory cells arranged symmetrically about a bit line in two rows and two columns. All four of the cells are connected to the bit line at a common electrical node, wherein selected cells are connected to a column line. The memory device also includes a row select driver for selecting memory cells in a single row; a column select driver for selecting a single column line; and circuitry for selecting one of the bit lines adjacent to a column line.

REFERENCES:
patent: 4758989 (1988-07-01), Davis et al.
patent: 4899309 (1990-02-01), Kitazawa et al.
patent: 4980861 (1990-12-01), Herdt et al.
patent: 5111428 (1992-05-01), Liang et al.
patent: 5202848 (1993-04-01), Hakagawara
Linderman, Richard W. et al., Design and Application of an Optimizing XROM Silicon Compiler, Dec., 1989, pp. 1267-1275.

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