Virtual ground line type memory device with high speed...

Details Virtual ground line type memory device with high speed... Virtual ground line type memory device with high speed...

2007-05-29

2007-05-29

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185160, C365S185180, C365S185250

Reexamination Certificate

active

11173925

ABSTRACT:
A semiconductor memory device having a virtual ground line type memory array structure includes a readout circuit for selecting a pair of selected bit lines connected to the source and the drain of a memory cell to be read, applying a predetermined voltage to between the paired selected bit lines, and sensing a memory cell current flowing through the memory cell to be read, and a counter potential generation circuit for generating from an intermediate node potential, which is higher than any level of the potential on the selected bit lines and supplied from an intermediate node on a current path for feeding the memory cell current in the readout circuit, a counter potential which varies in the same direction as of the intermediate node potential depending on the memory cell current so that its variation is greater than that of the intermediate node potential, wherein the counter potential is applied to an unselected bit line allocated next to one at a high level of the paired selected bit lines.

REFERENCES:
patent: 5027321 (1991-06-01), Park
patent: 6744667 (2004-06-01), Yamamoto et al.
patent: 6744674 (2004-06-01), Le et al.
patent: 6816423 (2004-11-01), Yamada
patent: 2003/0202411 (2003-10-01), Yamada
patent: 3-176895 (1991-07-01), None
patent: 2003-323796 (2003-11-01), None
European Search Report completed Mar. 9, 2006 for European Patent Application No. 05254075, two pages.

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