Radiant energy – Photocells; circuits and apparatus – Photocell controls its own optical systems
Reexamination Certificate
2000-08-15
2003-10-14
Allen, Stephane B (Department: 2878)
Radiant energy
Photocells; circuits and apparatus
Photocell controls its own optical systems
C356S400000, C355S053000
Reexamination Certificate
active
06633050
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to lithographic processing. More particularly, this invention relates to a system and method for placing a wafer surface at a desired focal plane using a virtual gauging technique during lithographic processing.
2. Related Art
Lithography is a process used to create features on the surface of substrates. Such substrates can include those used in the manufacture of flat panel displays, circuit boards, various integrated circuits, and the like. A frequently used substrate for such applications is a semiconductor wafer. While this description is written in terms of a semiconductor wafer for illustrative purposes, one skilled in the relevant art would recognize that other substrates could be used without departing from the scope of the instant invention.
During lithography, a wafer is disposed on a wafer stage and held in place by a chuck. The chuck is typically a vacuum or electrostatic chuck capable of securely holding the wafer in place. The wafer is exposed to an image projected onto its surface by exposure optics located within a lithography apparatus. While exposure optics are used in the case of photolithography, a different type of exposure apparatus may be used depending on the particular application. For example, x-ray, ion, electron, or photon lithographies each may require a different exposure apparatus, as is known to those skilled in the relevant art. The particular example of photolithography is discussed here for illustrative purposes only.
The projected image produces changes in the characteristics of a layer, for example photoresist, deposited on the surface of the wafer. These changes correspond to the features projected onto the wafer during exposure. Subsequent to exposure, the layer can be etched to produce a patterned layer. The pattern corresponds to those features projected onto the wafer during exposure. This patterned layer is then used to remove exposed portions of underlying structural layers within the wafer, such as conductive, semiconductive, or insulative layers. This process is then repeated, together with other steps, until the desired features have been formed on the surface, or in various layers, of the wafer.
Step-and-scan technology works in conjunction with a projection optics system that has a narrow imaging slot. Rather than expose the entire wafer at one time, individual fields are scanned onto the wafer one at a time. This is done by moving the wafer and reticle simultaneously such that the imaging slot is moved across the field during the scan. The wafer stage must then be asynchronously stepped between field exposures to allow multiple copies of the reticle pattern to be exposed over the wafer surface. In this manner, the sharpness of the image projected onto the wafer is maximized.
While using a step-and-scan technique generally assists in improving overall image sharpness, image distortions generally occur in such systems due to imperfections within the projection optics system, illumination system, and the particular reticle being used. Such image distortions are frequently due to the poor focus that results from the wafer surface being located somewhere other than in the desired focal plane of the projection optics. Since the surfaces of wafers are seldom planar, especially after multiple processing steps, focus problems are often related to the inability to know precisely how far the wafer surface is from the projection optics along the illumination axis of the lithography apparatus. This, in turn, often stems from the fact that most typical sensors or gauges used to measure the separation between the projection optics and the wafer surface cannot be located along the axis of illumination.
What is needed is a system and method that can be used to determine the separation between a wafer surface and the projection optics along the axis of illumination so that accurate focus can be maintained.
SUMMARY OF THE INVENTION
A system for monitoring wafer surface topography during a lithographic process is described, including projection optics to illuminate a portion of the wafer surface. The system further includes at least one off-axis wafer surface gauge that monitors wafer surface height relative to the projection optics, as well as at least one backplane gauge that monitors wafer position relative to a backplane. The system also includes a filter that translates time-domain measurements of off-axis wafer surface gauge and the backplane gauge into space-domain measurements. A coordinate transformer is included that transforms the space-domain measurements into a single coordinate system. A computational element that combines the space-domain measurements with a focus set-point to determine correction data is also included together with a delay line for storing the correction data until the wafer has moved a predetermined distance.
In a system according to the present invention, at least one off-axis wafer surface gauge is located a first distance from said axis of illumination, the first distance being substantially equal to the predetermined distance.
A system according to the present invention can also include at least one stalk gauge that monitors the distance between the projection optics and the backplane. Additional such stalk gauges can be included.
In a system according to the present invention, the filter can be a finite-impulse-response filter having a width that is controllable based on a velocity associated with movement of the wafer relative to the projection optics. Furthermore, the finite-impulse-response filter can output the space-domain measurements in response to a spatial interrupt triggered by a space clock determiner. The space clock determiner can trigger the spatial interrupt when the wafer moves a predetermined distance along a predetermined axis of movement. The predetermined distance can be between about 0.1 and 1.0 millimeters, and preferably approximately one-half a millimeter, and the predetermined axis of movement can be approximately parallel to the surface of the wafer.
Also disclosed is a method of monitoring wafer surface topography during a lithographic process. Such a method includes a first step of capturing wafer position and surface data at a first time when the wafer is at a first wafer location. Next is a step of generating correction data for a second wafer location prior to the wafer reaching the second wafer location. After this correction data is generated, it is stored in a spatial delay line. Finally, in a method according to the present invention, the wafer is moved based on the correction data when the wafer is at said second wafer location at a second time.
A method according to the present invention can further include a step of capturing backplane position data with a plurality of stalk gauges, as well as a step of converting the wafer position and surface data captured from a time-domain into a space-domain.
A method according to the present invention can also include a step of transforming at least some of the data captured from a first coordinate system into a second coordinate system such that all of the data captured is associated with a single coordinate system. Once this is done, a step of combining the wafer surface data and the wafer position data with focus set-point data in order to produce the correction data can be performed.
Also disclosed is a virtual gauging system for use in a lithographic process that includes means for gauging a region at a surface of a wafer when the region is located away from an axis of illumination producing wafer surface data, while other portions of the wafer are being illuminated. Further included in such a system is means for converting the wafer surface data into wafer correction data. Also included is means for adjusting a separation distance between an exposure lens and the region at the surface of the wafer based on the correction data when the region is located at the axis of illumination.
In the system so described, the means for gauging includes a
Allen Stephane B
ASML Holding NV.
Sterne Kessler Goldstein & Fox p.l.l.c.
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