Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2005-08-09
2005-08-09
Nguyen, Viet Q. (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S189080, C365S189020, C365S189030, C711S147000, C711S149000, C711S150000, C711S151000, C711S158000, C711S168000, C711S169000, C327S144000, C327S152000, C326S093000
Reexamination Certificate
active
06928027
ABSTRACT:
Disclosed is a virtual dual-port synchronous RAM device, system, and method, wherein the design requires minimal hardware cost compared with a dual-port RAM architecture or the traditional architecture used with a single-port RAM. Disclosed is a read/write memory device including means to accept signals from a first host and a second host, the first host having a first clock and the second host having a second clock, the signals including a first clock signal and a second clock, a clock switching means for switching between the first clock signal and the second clock signal, a single-port random access memory (RAM) module for storing data, and a RAM clock for synchronizing the clock signals with the RAM module.
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Brown Charles D
Jenckes Kenyon
Nguyen Viet Q.
Qualcomm Inc
Wadsworth Philip R.
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