Virtual address to physical address translation cache that suppo

Details Virtual address to physical address translation cache that suppo Virtual address to physical address translation cache that suppo

1993-09-08

1995-12-26

Whitfield, Michael A.

Boots, shoes, and leggings

364DIG1, 395419, G06F 1210

Patent

active

054796270

ABSTRACT:
A method and apparatus for translating a virtual address to a physical address. A virtual address to be translated has a virtual page offset and a virtual page number. The virtual address to be translated addresses a page of memory. The size of this page is unknown. There are L different possible page sizes where L is a positive integer greater than one. Each of the L different page sizes is selected to be a test page size and a test is performed. During the test, a pointer into a translation storage buffer is calculated. The pointer is calculated from the virtual address to be translated by assuming that the virtual address to be translated corresponds to a mapping of the test page size. The pointer points to a candidate translation table entry of the translation storage buffer. The candidate translation table entry has a candidate tag and candidate data. The candidate tag identifies a particular virtual address and the candidate data identifies a particular physical address corresponding to the particular virtual address. A virtual address target tag is extracted from the virtual address to be translated. The virtual address target tag is calculated by assuming that the virtual address to be translated corresponds to a mapping of the test page size. The target tag and the candidate tag are then compared. If the target tag matches the candidate tag, the candidate data is provided as the physical address translation corresponding to the virtual address to be translated.

REFERENCES:
patent: 3675215 (1972-07-01), Arnold et al.
patent: 4285040 (1981-08-01), Carlson et al.
patent: 4763250 (1988-08-01), Keshlear et al.
patent: 5058003 (1991-10-01), White
patent: 5263140 (1993-11-01), Riordan
patent: 5327372 (1994-07-01), Oka et al.
Tallure et al., "Tradeoffs in Supporting Two Page Sizes"; Computer News; May 1992, No. 2; New York; pp. 415-424.

Affiliated with

Also associated with

Rating

Virtual address to physical address translation cache that suppo does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Virtual address to physical address translation cache that suppo, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Virtual address to physical address translation cache that suppo will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1376406