Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Patent
1996-09-27
1999-01-19
Zimmerman, Mark K.
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
345204, 348500, 348513, H04L 700
Patent
active
058618791
ABSTRACT:
An input video signal is written into alternate field memories M1 and M2, according to a timing clock from an input video clock generator. A display video signal is alternately read from those field memories, according to a timing clock from a display video clock generator. In switching a read memory, an address observation circuit judges whether or not a read/write address passes by a write/read address, referring to the condition of reading and writing operations. In this event, the circuit makes a judgement, based on the lag between a vertical synchronizing signals of an input video signal and of a display video signal, and a change of the lag with time. If it is judged that one address will pass by the other, the same read/write memory is again accessed for reading/writing. With this arrangement, there is provided a circuit having a relatively simple structure for preventing a match of read and write addresses.
REFERENCES:
patent: 4018990 (1977-04-01), Long et al.
patent: 5291275 (1994-03-01), Lumelsky
patent: 5335337 (1994-08-01), Gagliarado et al.
Hotta Teruo
Sasaki Hideaki
Sawada Shigeru
Shimizu Yutaka
Kovalick Vincent E.
Sanyo Electric Co,. Ltd.
Victor Company of Japan Ltd.
Zimmerman Mark K.
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