Video signal processing circuit, video display, and display...

Television – Image signal processing circuitry specific to television – Special effects

Reexamination Certificate

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Details

C348S561000, C348S704000, C348S443000, C348S445000, C382S298000

Reexamination Certificate

active

07408589

ABSTRACT:
Provided is a video signal processing circuit capable, in a scale conversion, of rendering a circuit scale small and alleviating a deterioration of a vertical resolution. A vertical scaler is provided with a function of increasing the number of scanning lines of an input video signal. An increasing rate thereof is adjacent to 1.0. In a case that the number of unit output lines is M, the number of unit input lines is N, and the increasing rate is α, a condition of 0<α<2 is satisfied. That is, α is adjacent to 1.0. A number-of-a-plurality-of-time reading-out circuit performs a reading-out by a 3-time clock toward the input video signal. In addition, the number-of-a-plurality-of-time reading-out circuit is configured in such a manner as not to select the video signal read out by an address overtaking. A horizontal scaler interpolates the number of dots of a horizontal direction according to the number of horizontal dots of a liquid crystal panel.

REFERENCES:
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patent: 6831700 (2004-12-01), Hoshikawa
patent: 6903733 (2005-06-01), Greenberg et al.
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Japanese Office Action dated Oct. 9, 2007, issued in corresponding Japanese Patent Application No. 2004-128637.
Office Action dated Jun. 27, 2006, issued in corresponding Japanese patent application No. 2004-128638.

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