Video signal processing apparatus having series connected timing

Facsimile and static presentation processing – Facsimile – Recording apparatus

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Details

358325, 358323, 358337, 358339, 348500, 348512, 360 371, H04N 576, H04N 979

Patent

active

054001480

ABSTRACT:
A video signal processing apparatus for processing a video signal includes a plurality of series-connected signal processing circuits. A plurality of timing control circuits for respectively controlling the plurality of signal processing circuits in accordance with a reference signal are provided. At least one of the plurality of timing control circuits inputs a timing signal conforming to the reference signal, and delays the passage of the timing signal therethrough by a time interval corresponding to a delay time of the video signal generated by the corresponding signal processing circuit and outputs a delayed timing signal. Consequently, it is possible to minimize a change in the timing control circuits, that is, a change in the overall apparatus, caused by the partial change in the design of the signal processing circuits.

REFERENCES:
patent: 4679084 (1987-07-01), Topper et al.
patent: 4803553 (1989-02-01), Schrock et al.
patent: 5012352 (1991-04-01), Yoshimura et al.

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