Video signal processing apparatus having digital multivalue sync

Television – Synchronization – Sync generation

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348524, H04N 506

Patent

active

053879449

ABSTRACT:
A digital multivalue synchronizing signal generating circuit generates three-value synchronizing signals for one frame using an address counter operating by a clock frequency which is more than 50 times the horizontal frequency and a ROM, and the three-value synchronizing signals are limited in band by a digital filter operating by the sampling clock of the digital video signal, and a digital multivalue synchronizing signal is generated. The video signal processing apparatus possessing a digital multivalue synchronizing signal generating circuit combines the digital video signal and digital multivalue synchronizing signal digitally, and produces a video signal having a digital synchronizing signal, and by D/A conversion thereof, a video signal having a analog synchronizing signal without waveform deterioration in the synchronizing signal portion is obtained.

REFERENCES:
patent: 4723164 (1988-02-01), Nienaber
patent: 4864400 (1989-09-01), Kumada et al.
patent: 5012340 (1991-04-01), Kirschenstein
"Broadcasting Technology Association Standard BTAS-001", Aug. 1987.

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