Video signal detecting circuit for adjusting sync signals...

Television – Basic receiver with additional function – Multimode

Reexamination Certificate

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Details

C348S526000, C348S529000

Reexamination Certificate

active

07009661

ABSTRACT:
A video signal detecting circuit includes a synchronization detector for detecting a vertical synchronous signal in an input video signal. A counter starts counting pixel clock pulses in response to every vertical synchronous signal thus detected, and outputs a first signal when the count of pixel clock pulses reaches a preselected value. A comparator compares the vertical synchronous signal detected with the first signal for outputting a second signal representative of a difference between them. A mean circuit produces a mean value of the second signals over a plurality of pictures of the input video signal. An adjusting circuit adjusts the vertical synchronous signal with the mean value to output the resultant adjusted signal as a vertical synchronous signal. The preselected number is substantially equal to the standard number of pixels included in a single picture.

REFERENCES:
patent: 5872601 (1999-02-01), Seitz
patent: 6130721 (2000-10-01), Yoo et al.
patent: 6275264 (2001-08-01), Kim
patent: 6366327 (2002-04-01), Renner et al.
patent: 6545725 (2003-04-01), Fujita et al.
patent: 6795124 (2004-09-01), Gamo et al.
patent: 11341304 (1999-12-01), None

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