Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1991-04-26
1992-09-08
Kostak, Victor R.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358171, H04N 518
Patent
active
051463326
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a video signal delay circuit, used in a television receiver or a video tape recorder, for delaying a delay signal by a predetermined period of time by, e.g., a charge coupled device-type delay element (to be referred to as a CCD delay element hereinafter) and, more particularly, to a video signal delay circuit capable of compensating for attenuation of a signal that has passed through a CCD delay element.
2. Description of the Related Art
A video signal delay circuit is used in a television receiver in order to delay a television video signal for one horizontal period. A conventional video signal delay circuit comprises a CCD deay element and an amplifier. More specifically, a video signal is supplied directly to the CCD delay element and is delayed by it for one horizontal period. The video signal delayed by the CCD delay element is supplied to the amplifier, and attenuation caused by the CCD delay element is compensated for by the amplifier. As an amplifier of this type, one having a constant gain is conventionally used.
An attenuation amount of a video signal caused by a CCD delay element varies depending on a manufacturing error of the CCD delay element, a change in operating condition of the element, and the like and is thus not constant. Therefore, when a video signal output from the CCD delay element is amplified using an amplifier having a constant gain, the gain of the overall video signal delay circuit is not constant.
It is an object of the present invention to provide a video signal delay circuit which can stabilize, when a video signal is delayed by a semiconductor delay element such as a CCD delay element, the gain of the overall video signal delay circuit even if the attenuation amount of the video signal fluctuates due to the manufacturing error of the semiconductor delay element or the change in operating condition of the element.
SUMMARY OF THE INVENTION
According to the present invention, there is provided a video signal delay circuit comprising a clamp circuit for fixing a pedestal level of an input video signal to a predetermined level, a pulse signal inserting circuit for inserting a pulse signal in a signal period of the video signal partially corresponding to a blanking period thereof, the pedestal level of the video signal being fixed by the clamp circuit, the pulse signal having a predetermined level with respect to the pedestal level, a semiconductor delay element for receiving the video signal in which the pulse signal is inserted by the pulse signal inserting circuit, and for delaying the video signal by a predetermined period of time, a variable gain amplifier, having a variable gain, for receiving an output signal from the semiconductor delay element, and for amplifying the output signal, and a gain control circuit for controlling the gain of the variable gain amplifier such that the pulse signal included in a signal output from the variable gain amplifier is set at a predetermined level with respect to the pedestal level.
According to the present invention, a pulse signal having a predetermined level is inserted in part of a vieo signal having, a fixed pedestal level, partially corresponding to the blanking period thereof. The gain of the variable gain amplifier is controlled by the gain control circuit such that the pulse signal included in the signal output from the variable gain amplifier becomes the predetermined level with respect to the pedestal level. As a result, even when the attenuation amount of the video signal attenuated by a semiconductor delay element is not ocnstant because of a manufacturing error or a change in temperature, the gain of the overall video signal delay circuit can be kept at a predetermined value.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram showing the first embodiment of the present invention,
FIG. 2 shows an example of an operational waveform of a video signal delay circuit shown in FIG. 1,
FIG. 3 is a block diagram showing the secon
REFERENCES:
patent: 4110290 (1978-08-01), Wheeler
patent: 4374400 (1983-02-01), Holmes
patent: 4509181 (1985-04-01), Sauer
patent: 4811016 (1989-03-01), Millward et al.
Hara Kenji
Wada Yoshio
Kabushiki Kaisha Toshiba
Kostak Victor R.
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