Television – Format conversion – Changing number of lines for standard conversion
Reexamination Certificate
2005-05-10
2005-05-10
Yenke, Brian P. (Department: 2614)
Television
Format conversion
Changing number of lines for standard conversion
C348S441000, C348S443000, C348S445000, C348S446000, C348S459000, C348S524000, C348S536000, C348S537000, C348S544000
Reexamination Certificate
active
06891572
ABSTRACT:
A signal processing apparatus and method for up or down conversion of an interlace signal with a high degree of accuracy. The frequency of a write system clock supplied from a PLL circuit is divided by N by a dividing circuit and then multiplied by M by a multiplying circuit to produce a readout system clock. An interpolation circuit writes a video signal into a frame memory in synchronism with the write system clock from the PLL circuit, and reads out the video signal in synchronism with the readout system clock from the multiplying circuit.
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Lerner David Littenberg Krumholz & Mentlik LLP
Sony Corporation
Yenke Brian P.
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