Video signal clamping method and apparatus with negative peak de

Television – Image signal processing circuitry specific to television – Gray scale transformation

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348683, 348685, H04N 0718

Patent

active

059867191

ABSTRACT:
A video clamping apparatus is described which uses transistors manufactured in a CMOS process to clamp an input video signal to a reference level during a SYNC period. A closed-loop system is provided which includes a buffer amplifier, a sample-and-hold device, a summer, a low-pass filter and a clamping circuit. The summer compares the output of the sample-and-hold device to a reference voltage which causes an output of an analog-to-digital converter to be the digital word zero.
In order to maintain a high enough bandwidth of the closed loop system, a first current source is operatively coupled to the transistors of the clamping circuit during the SYNC period. When the SYNC period has ended, the first current source is decoupled from the transistors of the clamping circuit. The transconductance of the loop is, therefore, high when needed during the SYNC period. A second current source, smaller than the first current source, is coupled to the clamping circuit when SYNC period is not present so as to control droop during the horizontal scan.

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