Video processor with multiple overlay generators and/or...

Computer graphics processing and selective visual display system – Computer graphics processing – Graphic manipulation

Reexamination Certificate

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Details

C345S949000, C345S950000, C345S951000, C345S634000, C382S284000, C348S589000, C348S590000, C348S591000, C348S592000, C348S585000

Reexamination Certificate

active

06621499

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to video processing devices and methods and more particularly to video processing devices and methods having a bidirectional port and/or multiple overlay image generators such as keyers or alpha blenders.
BACKGROUND OF THE INVENTION
Video processing devices, such as video graphics controllers and other video processing devices may be designed to facilitate the presentation of both graphic data and video data on a display device, such as a computer screen. For example, with multimedia applications, a computer user may be using a word processor while watching a movie. The video processor generates overlays so that the movie appears in a comer or window within the display screen simultaneously with text information from the word processor application. Complex format conversions, scaling, video decompression, and other processes may be necessary. In addition, video processing devices, such as graphics controller chips, may have multiple input/output ports to allow data to be transferred from or to various video encoders, digital decompression modules, digital-to-analog converters, flat panel displays, television output ports and many other peripheral blocks.
Some video processing circuits allow compatibility with older and newer video formats over a common bus or port. For example,
FIG. 1
shows a block diagram of a conventional video graphics processor having a frame buffer
10
that stores both graphics data and video data. The frame buffer
10
may be one or more memory modules. In one direction, the frame buffer, through common port
12
, receives video information
14
through a buffer
16
via a video capture engine
18
, as known in the art. The video capture engine then stores the captured video in the frame buffer
10
. In another direction, through the common port
12
, the graphics controller can output graphics information
20
obtained from graphics memory reader
22
to a data serializer
24
through a unidirectional output switch
26
. The unidirectional output switch
26
may be, for example, a group of tri-state buffers controllable by control signal
28
by a host computer, for example, to allow the direction of information from the common port to flow out from the port or be received from the port through the buffer
16
.
An image overlay generator
30
receives graphics information
20
and video information
32
obtained by video memory reader
31
and combines the data
33
for display, for example, on a television through a television out port
34
or may output the combined information
33
to a digital-to-analog converter
36
, a flat panel display
38
or other suitable device, process or subprocess. A color space converter
40
converts, for example, video data that may be in Y,Cr,Cb format to RGB format that can be accommodated by the image overlay converter
30
. It is useful to reduce the number of color space converters since the converters require integrated circuit space and absorb processing capabilities of the video graphics controller for each conversion.
Conventional graphics controllers may also include, for example, a palletizer RAM
42
that stores graphics data in a predefined format, and if desired, an unpacker
42
that unpacks graphics data that has been stored in a predefined format in the frame buffer. The graphics controller outputs the palletized information or unpacked information to a switch
46
which then allows information to be sent to the serializer
24
or image overlay generator
30
. The graphics information is typically in a RGB color space format, and video data is typically in a Y,Cr,Cb color space (digital). As such, a color space converter
52
may be used to convert RGB information from the video memory reader to Y,Cr,Cb information and is passed through a switch
54
to a scaler
56
. The scaler
56
may scale the video information to fit within a smaller or larger window within the display space, for example.
A conventional video graphics controller may be connected through a common port to a video encoder
60
, a video decompressor
62
, such as an MPEG video decompressor, a video decoder
64
and a video compressor
66
, such as an MPEG video compressor. The encoders and compressors are typically used to convert data to and from the graphics controller to suitable compressed or decompressed format for other devices, such as digital video discs (DVD's), other display devices and software applications. As shown by arrows
68
a
,
68
b
,
68
c
and
68
d
the output from the video decoder may be passed directly to an MPEG compressor to be compressed for another subsystem or software application within a multimedia system or video system. A control signal
28
is again used to control whether the decompressor or decoder is operational.
It becomes increasingly important to keep the size of graphics controllers and video processing devices small while still increasing the amount of video and-graphics processing ability and types of video processing capabilities. Conventional processors often add additional ports or pins to accommodate additional functionality. In addition, systems such as those shown in
FIG. 1
typically do not provide the capability of allowing multiple overlays to be output from a common data source. With the increasing number and types of different displays that may be coupled to a single graphics processing device, it would desirable to allow multiple displays to show the same or differing overlay if desired from the same data source, such as buffer memory
10
.
Consequently, a need exists for a video processing device and method that facilitates additional functionality over a common port and if desired, to provide additional overlay capability for multiple displays and/or peripheral modules to allow independent or dual processing of graphics and video overlay information.


REFERENCES:
patent: 5220312 (1993-06-01), Lumeisky et al.
patent: 5254984 (1993-10-01), Wakeland
patent: 5583536 (1996-12-01), Cahill, III
patent: 5598525 (1997-01-01), Nally et al.
patent: 5634040 (1997-05-01), Her et al.
patent: 5710573 (1998-01-01), Hung et al.
patent: 5877741 (1999-03-01), Chee et al.
patent: 5883610 (1999-03-01), Jeon
patent: 5889499 (1999-03-01), Nally et al.
patent: 6157415 (2000-12-01), Glen
patent: 6177946 (2001-01-01), Sinclair et al.
patent: 6184906 (2001-02-01), Wang et al.
patent: 6249288 (2001-06-01), Campbell
patent: 6310659 (2001-10-01), Glen
Video Electronics Standards Association (VESA): VESA Video Interface Port (VIP), Version: 2, October 21, 1998.

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