Television – Image signal processing circuitry specific to television – With details of static storage device
Reexamination Certificate
1998-03-13
2003-03-04
Miller, John (Department: 2614)
Television
Image signal processing circuitry specific to television
With details of static storage device
C348S715000, C348S716000, C348S718000, C345S541000, C345S543000
Reexamination Certificate
active
06529249
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to video data processing and display, and more particularly the invention relates to a video processor system having reduced memory capacity requirements through the sharing of physical memory space.
A video picture is created by scanning a display surface line-by-line from top to bottom, such as by an electron beam scanning a phosphor-coated surface. Video processing and display are based on industry standards such as NTSC in North America, and PAL in Europe. In the NTSC standard, one picture or frame comprises two interlaced fields, with each field having 240 scan lines and a frame having 480 scan lines. Each scan line has 704 picture elements or pixels with the light intensity of a pixel being defined by an 8-bit digital code. Each frame is scanned 30 times per second, therefore, 60 interlaced fields are scanned per second. Each NTSC frame requires 506,880 bytes of data; a PAL frame requires 608,256 bytes of data. Additional memory storage is required in processing compressed data, such as according to the MPEG standard, to recover the full video data. Thus, the memory requirements of a video processor system can become enormous.
The present invention reduces required memory storage capacity by reconstructing part of a field or frame of data while other parts of the field or frame data are being displayed, the reconstructed data then being stored by overwriting the displayed data in memory.
SUMMARY OF THE INVENTION
In accordance with the invention, a video processor reconstructs digital video data for a picture field or frame while the field or frame is being displayed. Once a portion of the picture is displayed, the memory location for the displayed portion can be reused for the latest reconstructed data.
More particularly, in accordance with one embodiment of the invention, a picture frame is divided into a plurality of regions, such as 6 regions from top to bottom of the frame. The scan lines for a first or top field and for a second or bottom field thus define 12 logical regions; 6 for the top field and 6 for the bottom field. In accordance with one feature of the invention, the memory for storing pixel data for the scan lines can have fewer physical storage regions than there are picture regions. For example, 9 memory regions can be used for storing the 12 picture regions. As. stored data for scan lines is read for scanning a display surface, the data is erased or overwritten as the memory storage area becomes available for newly calculated data. Thus, an index or pointers to the storage locations are continually updated as displayed data is erased and new data is stored.
Processor speed in calculating new video (pixel) data necessarily must be at least as fast as the accessing of video data for imaging in order to provide the frame or field data as a frame or field is being displayed. Attendant with the increased processor speed is a reduction in required memory capacity.
The invention and objects and features thereof would be more readily apparent from the following detailed description and dependent claims when taken with the drawing.
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Lo Linus H.
Miller John
Oak Technology
Townsend and Townsend / and Crew LLP
Woodward Harry K.
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