Video processor for enlarging and contracting an image in a vert

Details Video processor for enlarging and contracting an image in a vert Video processor for enlarging and contracting an image in a vert

1994-03-11

1995-06-06

Groody, James J.

Television

Image signal processing circuitry specific to television

Special effects

345127, H04N 5262

Patent

active

054226783

ABSTRACT:
A video processor which is capable of arbitrarily expanding or contracting an image in a vertical direction is described. A horizontal synchronizing signal HS of a video signal CS is inputted to a reference input terminal 63a of a phase comparator 63 of a PLL circuit 62 to take out a clock signal CK having a frequency N1 times larger than that of the horizontal synchronizing signal HS. This clock signal is frequency-divided by N2. Since N2 is set to the number of horizontal synchronizing signals within a vertical synchronous period, the number of sampling lines in a vertical direction becomes equal to N1. Accordingly, When an output signal (line clock signal LCK) of the frequency divider 67 is used as a signal for increment of a vertical address of a video memory 70, enlargement/contraction of an image can be carried out by changing N1.

REFERENCES:
patent: 4454537 (1984-06-01), Okada et al.
patent: 4651225 (1987-03-01), Yamada
patent: 4780759 (1988-10-01), Matsushima et al.
patent: 4952923 (1990-08-01), Tamura
patent: 5068651 (1991-11-01), Takebe et al.
patent: 5068731 (1991-11-01), Takeuchi
IBM Technical Disclosure Bulletin, vol. 29, No. 11, Apr. 1987, "Programmable Dot Clock For Video Adapter".

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