Video processing technique using multi-buffer video memory

Computer graphics processing and selective visual display system – Display peripheral interface input device – Light pen for fluid matrix display panel

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345200, 345201, G09G 500

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active

055681654

ABSTRACT:
In a preferred embodiment, when full-motion video data is to be captured on a hard disk, a full-motion video memory on a video controller card has its addresses segmented into four groups, where each group can store one scaled-down frame (or field) of video data. The video memory is arranged to effectively act as a four-frame, first-in first-out (FIFO) buffer. The holding time of a single frame of data (i.e., four times the conventional holding time) in the video memory is sufficient to allow for the unpredictable variations in the hard drive timing so that frames are not arbitrarily dropped by worst case timing/accessing times of the hard drive. Hence, the average bandwidth and timing of the hard drive, rather than the instantaneous worst case bandwidth and timing of the hard drive, is used when designing the system. Additionally, if the average bandwidth of the hard drive is not sufficient to capture all the frames of data being stored in the video memory, a time scaling feature is employed to selectively drop frames of data at periodic intervals to match the average frame capture rate to the rate at which frames are being stored in the video memory. Thus, the maximum capturable frame rate is realized given the particular hard drive used in the system.

REFERENCES:
patent: 4468708 (1984-08-01), Coleman, Jr.
patent: 4523227 (1985-06-01), Hurst
patent: 4816815 (1989-03-01), Yoshiba
patent: 4862269 (1989-08-01), Sonoda et al.

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