Video processing apparatus

Computer graphics processing and selective visual display system – Display peripheral interface input device – Light pen for fluid matrix display panel

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Details

345127, 345114, 273 85G, 273DIG28, G09G 106

Patent

active

053271580

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

The present invention generally relates to a video processing apparatus for use with a television set or the like which can process and display not only moving picture character symbols but also a background picture (or a still picture).


PRIOR ART

Techniques for rotating a moving picture character symbol are well known. For example, video games such as Space War and Computer Space providing rotation of moving character symbols have been widely played for decades. Japanese Patent Publication No. 45,225/1980 and Japanese Patent Laid-Open Gazette No. 113,529/1976 (counterpart to U.S. Pat. No. 4,026,555) also disclose moving picture symbol rotation.
Techniques for rotating a background picture are also known. An exemplary such prior art system may be represented by the block diagram shown in FIG. 17. In the block diagram shown in FIG. 17, a video RAM (referred to as "VRAM" hereinafter) 102 comprising a random access memory (referred to as "RAM" hereinafter) as well as a CPU 103 are connected to a picture processing unit 101. A main memory 104, storing image data for a background picture, moving picture character symbols, and control data for displaying and controlling the image data, is connected to the CPU 103. The image data stored in the main memory 104 are transferred to the VRAM 102 through the picture processing unit 101. On the basis of the control data from the CPU 103, the picture processing unit 101 reads data from the VRAM 102 and outputs the data as a video signal to a display device 105. Display device 105 displays an image according to the data. Addresses of the VRAM 102 correspond to positions in the horizontal and vertical directions of the image displayed on the display device 105. The above described moving picture character symbol image data and/or the background picture data are stored in respective addresses of the VRAM 102.
The above-described conventional television video game system is capable of rotating, enlarging or reducing background pictures for display. When a predetermined background picture is rotated, [or] enlarged, or reduced and displayed on the display device 105, the CPU 103 calculates (during a vertical blanking period), a new horizontal position and a new vertical position on the basis of an original position in the horizontal direction (referred to as "horizontal position" hereinafter) and an original position in the vertical direction (referred to as "vertical position" hereinafter) on a display screen of the image data of the original background picture stored in the VRAM 102. The CPU 103 then writes the image data of the original background picture into addresses of the VRAM 102 which corresponds to the new horizontal position and the new vertical position as calculated. Thereafter, during horizontal scanning, the picture processing unit 102 sequentially converts the data written in the VRAM 102 into a video signal and outputs the same to the display device 105.
Techniques for enlarging or reducing a background picture such as that disclosed in Japanese Patent Laid-Open Gazette No. 172088/1985 (counterpart to U.S. Pat. No. 4,754,270) are also known.
The technique disclosed in Japanese Patent Publication No. 45225/1980 or Japanese Patent Laid-Open Gazette No.113529/1976 for rotating a moving picture character symbol cannot be used for the rotation of a background picture.
The above-described prior art shown in FIG. 17 has the following disadvantage: When a background picture is to be rotated or enlarged or reduced and displayed, the CPU 103 must calculate the new horizontal and vertical positions. The rotation processing or the enlargement or reduction processing of the background picture typically takes a relatively long time. Accordingly, the throughput of the CPU 103 is reduced since the CPU 103 cannot perform very much other video processing.
Additionally, when the background picture is subjected to rotation processing or enlargement or reduction processing as described above, the image data of the background picture stored in the VRAM 1

REFERENCES:
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patent: 4398189 (1983-08-01), Pasierb, Jr. et al.
patent: 4580782 (1986-04-01), Ochi
patent: 4593407 (1986-06-01), Konishi et al.
patent: 4602286 (1986-07-01), Kellar et al.
patent: 4672541 (1987-06-01), Bromley et al.
patent: 4754270 (1988-06-01), Murauchi
patent: 4824106 (1989-04-01), Ueda et al.
patent: 4850028 (1989-07-01), Kawamura et al.
patent: 4895376 (1990-01-01), Chiang Shiung-Fei

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