Computer graphics processing and selective visual display system – Data responsive crt display control – Data responsive intensity control
Reexamination Certificate
2001-09-12
2004-05-25
Wu, Xiao (Department: 2674)
Computer graphics processing and selective visual display system
Data responsive crt display control
Data responsive intensity control
C345S022000, C345S690000, C345S597000, C348S564000
Reexamination Certificate
active
06741224
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a display device, and more particularly, to an apparatus and a method for increasing the number of colors embedded in an on-screen display (hereinafter, referred to as OSD) signal.
2. Description of the Related Art
Color image signals are generally displayed on the screen of a display device using three signals: red, green and blue (R, G, and B). The color of an image signal varies depending on the relative strength, or intensity value, of the three signals R, G, and B. An OSD signal also displays user interface information on the screen of a display device using the three signals R, G, and B. An OSD occupies a portion of the screen of a display device, for example displaying information for interfacing with users.
FIG. 1
shows a schematic block diagram of a general display device. Referring to
FIG. 1
, the display device includes a video pre-amplifier
100
, a drive amplifier
110
, an OSD processor
120
, and a micro-controller
130
.
The video pre-amplifier
100
receives R, G, and B video signals R_V, G_V, and B_V and OSD signals R_OSD, G_OSD, and B_OSD, synthesizes each of the R, G, and B signals based on the video and OSD signals, and generates output signals R_OUT, G_OUT, and B_OUT in an intermediate step by amplifying the synthesized signals. The signals R_OUT, G_OUT, and B_OUT output from the video pre-amplifier
100
are reamplified in the drive amplifier
110
, output to a monitor
150
, and displayed on screen. The monitor
150
is, for example, a cathode ray tube (CRT) monitor.
The OSD signals R_OSD, G_OSD, and B_OSD are generated in the OSD processor
120
and input into the video pre-amplifier
100
. The video pre-amplifier
100
and the OSD processor
120
are controlled by the micro-controller
130
.
The OSD signals R_OSD, G_OSD, and B_OSD are, for example, each 1 bit and thus the OSD signals R_OSD, G_OSD, and B_OSD are a total of 3 bits. Therefore, 8(2*2*2) colors are expressed with the OSD signals R_OSD, G_OSD, and B_OSD of 3 bits. If the OSD signals R_OSD, G_OSD, and B_OSD are a total of 6 bits among which the OSD signals R_OSD, G_OSD, and B_OSD are each 2 bits, 64(4*4*4) colors can be expressed. If the OSD signals R_OSD, G_OSD, and B_OSD are a total of 9 bits among which the signals R_OSD, G_OSD, and B_OSD are each 3 bits, 512(8*8*8) colors can be expressed.
However, as shown in
FIG. 1
, the video pre-amplifier
100
and the OSD processor
120
are generally realized as different chips in the general display device. Thus, as the number of bits of the OSD signals R_OSD, G_OSD, and B_OSD increases, the number of output pins of the OSD processor
120
and the number of input pins of the video preamplifier
100
also increase.
A block diagram of a video pre-amplifier
200
according to the prior art in which OSD signals R_OSD, G_OSD, and B_OSD are a total of 3 bits is shown in FIG.
2
. Referring to
FIG. 2
, the video pre-amplifier
200
comprises an OSD interface block
210
and a video signal amplifying block
220
. The OSD interface block
210
receives OSD signals R_OSD, G_OSD, and B_OSD, each of which are 5 V peak-to-peak (hereinafter, pp is used to represent peak-to-peak) value, and levels them off to 0.7 Vpp. The video signal amplifying block
220
synthesizes the leveled OSD signals R_OSD, G_OSD, and B_OSD with video signals R, G, B; amplifies the synthesized signals; and generates output signals R_OUT, G_OUT, and B-OUT which are 4 Vpp.
FIG. 3
shows a waveform diagram of an OSD signal OSD, a video signal VIDEO (R_V, G_V, and B_V in FIG.
1
), and an output signal OUT (R_OUT, G_OUT, and B_OUT) in the video pre-amplifier
200
shown in FIG.
2
. In the output signal OUT, the video signal VIDEO stops and the OSD signal OSD is output in a section of the output signal OUT. The OSD signal is a single bit and thus it has two levels, i.e., a high level ‘1’ and a low level ‘0’.
A diagram for showing colors, which varies according to combinations of the R, G, B OSD signals R_OSD, G_OSD, and B_OSD in the video pre-amplifier
200
shown in
FIG. 2
, is illustrated in FIG.
4
. The R, G, and B OSD signals R_OSD, G_OSD, and B_OSD are each 1 bit, i.e., a total of 3 bits. Thus, eight colors can be expressed. When the R, G, B OSD signals R_OSD, G_OSD, and B_OSD are at the levels ‘000’, the color is ‘Black’. The levels ‘001’ produce ‘Blue’, the levels ‘010’ produce ‘Green’, the levels ‘011’ produce ‘Cyan’, the levels ‘100’ produce ‘Red’, the levels ‘101’ produce ‘Magenta’, the levels ‘110’ produce ‘Yellow’, and the levels ‘111’ produce ‘White’.
As previously described, in the video pre-amplifier
200
according to the prior art, the R, G, and B OSD signals R_OSD, G_OSD, and B_OSD are each 1 bit and thus only eight colors was expressed. Conventionally, an OSD was simply designed in a single color due to the properties thereof and thus it was unnecessary to realize various colors by a difficult method. However, as methods for expressing OSDs change and the demand for a greater variety of elegant colors increases, there is an increasing need to express OSD signals in a variety of colors. For this reason, as the number of bits of the OSD signal increases, the number of output pins of the OSD processor
120
and the number of input pins of a video pre-amplifier
100
increase as previously described.
Consequently, a video pre-amplifier for a display device and a method of increasing the number of colors of an OSD capable of minimizing an increase in the number of input/output pins and providing a variety of colors are required.
SUMMARY OF THE INVENTION
To address the above limitations, it is an object of the present invention to provide a video pre-amplifier for a display device, which is capable of minimizing an increase in the number of input/output pins, while providing a variety of colors.
It is another object of the present invention to provide a method of increasing the number of colors of an OSD signal, which is capable of minimizing an increase in the number of input/output pins, while providing a variety of colors.
Accordingly, to achieve the above first object, according to an aspect of the present invention, there is provided a video pre-amplifier for a display device which synthesizes, amplifies and outputs received R, G, and B video signals and R, G, and B OSD (On-Screen Display) signals, respectively. The video pre-amplifier for a display device includes; an OSD interface block for receiving the R, G, and B OSD signals, modifying, or leveling, their peak-to-peak voltage levels in response to a predetermined intensity control signal, and outputting the leveled R, G, and B OSD signals; and a video signal amplifying block for synthesizing the leveled R, G, and B OSD signals with the R, G, and B video signals, respectively, amplifying the synthesized signals, and generating R, G, and B output signals.
According to another aspect of the present invention, there is provided a video pre-amplifier for a display device which synthesizes, amplifies, and outputs received R, G, and B video signals and R, G, and B OSD (On-Screen Display) signals, respectively. The video pre-amplifier includes: an OSD interface block for receiving the R, G, and B OSD signals and outputting modified, or leveled R, G, and B OSD signals, the OSD interface block having an R OSD interface unit for leveling the R OSD signal in response to an R control signal and generating the leveled R OSD signal, a G OSD interface unit for leveling the G OSD signal in response to a G control signal and generating the leveled G OSD signal, and a B OSD interface unit for leveling the B OSD signal in response to a B control signal and generating the leveled B OSD signal; a video signal amplifying block for synthesizing the leveled R, G, and B OSD signals with the R, G, and B video signals, respectively, amplifying the synthesized signals, and generating R, G, and B output signals; an IIC bus control unit for being in charge of an interface between a micro-controller and the video signal amplifying block in the display devic
Mills & Onello LLP
Samsung Electronics Co Ltd.
Wu Xiao
LandOfFree
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