Video noise reduction circuit having improved transient characte

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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Details

358 36, H04N 521

Patent

active

046139052

ABSTRACT:
In a noise reduction circuit an input video signal is applied to a pair of low-pass filters having high and low time constant values to reject noise components, the noise-free output of the low-pass filter having the smaller time constant being scaled down and combined with the noise-free output of the filter having the high constant value. The input video signal is concurrently delayed with respect to the signal applied to the low-pass filters and applied to a differential amplifier where a difference between them is detected and fed to a limiter to generate an offset voltage. This offset voltage is destructively combined with the delayed video signal.

REFERENCES:
patent: 4302768 (1981-11-01), Kamura
patent: 4393396 (1983-07-01), Raven

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