Television – Receiver circuitry – Automatic frequency control
Reexamination Certificate
2000-11-16
2004-03-02
Lee, Michael (Department: 2614)
Television
Receiver circuitry
Automatic frequency control
C348S731000, C455S192200, C455S192300
Reexamination Certificate
active
06700629
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a video intermediate frequency processing apparatus which performs video detection in a television receiver.
BACKGROUND OF THE INVENTION
In general, a television signal is tuned to a desired channel by a tuner which functions as a television receiver, and thereafter, is converted into a video intermediate frequency signal on the basis of an oscillation frequency of a local oscillator circuit so that a prescribed video intermediate frequency f
0
(e.g., in Japan, f
0
=58.75 MHz, and in U.S., f
0
=45.75 MHz) is transmitted as a carrier wave. So, in the television receiver, an AFT (Automatic Frequency Tuning) circuit detects a shift between a carrier frequency of a video intermediate frequency outputted from a tuner and the video intermediate frequency f
0
so that an oscillation frequency obtained by the local oscillator circuit becomes a true video intermediate frequency, and then, feeds the detection result back to the local oscillator circuit of the tuner. In the manner as described above, a frequency of the video intermediate signal outputted from the tuner is coincident with a video intermediate frequency.
The tuner can stably output a video intermediate signal using this feedback control, and then, the outputted video intermediate signal is inputted to a next-stage video intermediate frequency processing apparatus. The video intermediate frequency processing apparatus is an apparatus for video detection with respect to the inputted video intermediate signal. In general, the video intermediate frequency processing apparatus includes various circuits such as an AFT circuit for carrying out the above feedback control.
The following is a description a construction and operation of a conventional video intermediate frequency processing apparatus.
FIG. 3
is a block diagram schematically showing a construction of a conventional video intermediate frequency processing apparatus
300
. In general, the video intermediate frequency processing apparatus is realized by an IC (Integrated Circuit), and employs a video detection system using a PLL (Phase-Locked Loop). In order to simplify the explanation, parts of the IC having no relation with the present invention are omitted from the figure.
The conventional video intermediate frequency processing apparatus
300
receives a video intermediate signal (VIF signal) in a VIF-AMP
11
such as an AGC (Auto Gain Control) amplifier via a pad P
1
. In this case, the inputted video intermediate signal is outputted from a tuner (not shown), and thereafter, is inputted to an intermediate frequency filter (not shown) such as a SAW (Surface Acoustic Wave) filter or the like, and thereby, becomes a signal which is in a state of removing unnecessary signals of adjacent channels.
A signal passing through the VIF-AMP
11
is inputted to a video signal detection circuit (VIDEO-DET.)
12
, and then, a video AM detection is made herein. Then, a video detection signal (VIDEO detection output), which is the detection result of the VIDEO-DET.
12
, is outputted via a pad P
4
, and thus, is inputted to an IF-AGC circuit
13
.
The IF-AGC circuit
13
is a circuit for detecting a synchronizing amplitude, and operating the VIF-AMP
11
so that a video detection signal always has a constant level. More specifically, the VIF-AMP
11
receives the detection result of the IF-AGC circuit
13
as an AGC voltage, and thereby, even if an amplitude of a VIF signal inputted to the video intermediate frequency processing apparatus changes, it is possible to make the signal constant after video AM detection. In this case, a signal outputted from the IF-AGC circuit
13
is connected to an IF-AGC filter
14
, which functions as a low-pass filter, via a pad P
2
, and is integrated to a sufficient DC (direct current) voltage as an AGC voltage of the VIF-AMP
11
.
Moreover, as shown in
FIG. 3
, a PLL is composed of a phase detector (APC)
15
, a voltage control oscillator (VCO)
16
, and an APC filter
17
which is connected via a pad P
3
and functions as a low-pass filter, and generates a signal having the same frequency and phase as a carrier-wave of the VIF signal. The above VIDEO-DET.
12
receives a signal generated by the PLL, that is, an output signal from the VCO
16
for synchronous detection, and thus, can output a base-band video detection signal which is a detection output.
The output signal of the VCO
16
constituting the above PLL is also inputted to an AFT circuit
18
. As described before, the AFT circuit
18
is a circuit which detects a shift between a carrier frequency of the VIF signal and the video intermediate frequency f
0
, and outputs a DC voltage in accordance with the shift. The function and operation of the AFT circuit itself have been generally widely known; therefore, the details are omitted.
In this case, as the AFT circuit
18
, it is preferable to use the prior invention “AFT circuit” made by the same invention who made the present invention. The prior invention “AFT circuit” compares an output signal frequency of the above VCO
16
with a reference signal frequency produces by a stable oscillator, such as a crystal oscillator circuit or the like, and thereby, realizes stable AFT operation without depending upon dispersion factors such as an offset of component circuit and temperature characteristic.
For example, when the output signal frequency of the VCO
16
is equal to the video intermediate frequency f
0
, the aforesaid AFT circuit
18
outputs a voltage Vcc/2 (Vcc: supply voltage) On the other hand, when the output signal frequency of the VCO
16
is lower than the video intermediate frequency f
0
, the aforesaid AFT circuit
18
outputs a DC voltage higher than Vcc/2; conversely, when the output signal frequency of the VCO
16
is higher than the video intermediate frequency f
0
, the aforesaid AFT circuit
18
outputs a DC voltage lower than Vcc/2, in accordance with a shift of frequency.
The DC voltage outputted from the AFT circuit
18
is inputted to an AFT-DEFEAT circuit
19
. The AFT-DEFEAT circuit
19
is a circuit for preventing a malfunction of the AFT circuit
18
, and makes a decision whether or not a DC voltage outputted from the AFT circuit
18
should be outputted as an AFT voltage via a pad P
5
. In this case, the IF-AGC circuit
13
can detect a weak electric field state and a no-signal state of the video detection signal. Moreover, a lock detector (LOCK-DET.)
20
shown in
FIG. 3
is a circuit which receives a video detection signal of being the detection result of the VIDEO-DET.
12
, and detects a state that the PLL is unlocked.
The AFT-DEFEAT circuit
19
inputs the detection result outputted from the IF-AGC circuit
13
and LOCK-DET. circuit
20
, and then, in the case where the input detection result shows a weak electric field state, no signal state or a state that the above PLL is unlocked, fixedly outputs ½ Vcc as an AFT voltage without outputting the DC voltage outputted from the AFT circuit
18
as the AFT voltage.
The video intermediate frequency processing apparatus has the circuit configuration as described above, and thereby, realizes a video detection and a stable video intermediate signal output from a tuner. However, a free-running frequency of the VCO
16
has a dispersion to some degree in an IC manufacturing process; for this reason, the free-running frequency needs to be adjusted so as to become the same as the video intermediate frequency f
0
. In particular, the adjustment must be accurately made in order to secure a pull-in frequency range of the PLL and to prevent a characteristic deterioration of video detection output due to a static phase error.
Usually, the adjustment of the free-running frequency is made in the following manner. More specifically, first, a VIF signal is put in a no-signal state, and as shown in
FIG. 3
, a switch SW
10
for grounding the pad P
2
connected to the IF-AGC filter
14
is turned on, thereby, making minimum a gain of the VIF-AMP
11
, that is, a state having no influence from a dist
Lee Michael
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
LandOfFree
Video intermediate frequency processing apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Video intermediate frequency processing apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Video intermediate frequency processing apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3285751