Computer graphics processing and selective visual display system – Computer graphic processing system – Interface
Patent
1997-11-14
1999-11-09
Lao, Lun-Yi
Computer graphics processing and selective visual display system
Computer graphic processing system
Interface
345132, 345507, 711219, G09G 500
Patent
active
059823976
ABSTRACT:
A video graphics controller (VGC) for communicating with a frame buffer memory and a display device includes a first-in, first-out (FIFO)-configured memory, a memory controller for communicating with the frame buffer memory and controlling the FIFO-configured memory, and read and write pointers for the FIFO-configured memory. A subtractor is coupled to the read and write pointers for generating a difference signal which is coupled to the memory controller, and the read pointer generates a read carrier signal which is provided to a lock detector along with an end-of-frame signal. The lock detector generates an output signal which is coupled to the memory controller in order to place the video graphics controller in a locked mode of operation if no read carry signal is generated during an inputting of an entire frame of information into the FIFO-configured memory, and in an unlocked mode of operation if a read carry signal is generated prior to the completion of the inputting of an entire frame of information.
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Biren Steven R.
Lao Lun-Yi
Nguyen Jimmy Hai
Philips Electronics North America Corporation
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