Video frame synchronization of independent timing generators for

Details Video frame synchronization of independent timing generators for Video frame synchronization of independent timing generators for

1997-08-20

1999-10-05

Tung, Kee M.

Computer graphics processing and selective visual display system

Display driving control circuitry

Display power source

345 1, 345504, 348 52, G09G 500

Patent

active

059632003

ABSTRACT:
A method and apparatus for synchronizing the vertical blanking of multiple frame buffers which may exist on the same computer or separate computers for certain applications including stereo display, virtual reality and video recording, which require such synchronization. To obtain the required synchronization one frame buffer is designation as the master. It provides a signal called FIELD that changes state (0 to 1 or 1 to 0) at the start of every vertical sync event on the master frame buffer. All other frame buffers are set to be slaves. Their timing generators sample the master's FIELD signal. When they detect the master's FIELD signal changing state, they set their own internal timing to match to thereby achieve frame synchronization.

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