Video encoder and/or decoder

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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Details

C375S240000, C375S240010, C375S240240

Reexamination Certificate

active

06937661

ABSTRACT:
A video codec (1) is provided in which a frame sync (FS) in base-band video data is delayed a predetermined time. A processor (14) is provided to make interrupt in a timing that is based on the delayed frame sync and make settings for input/output processing with respect to input/output modules (11and13). The processor (14) makes interrupt in a timing which is based on any of the delayed frame sync, video clock (V. Clk) and system clock (Sys. Clk) to control encoding or decoding start timing of a codec module (12). Thus, base-band video data can be encoded and decoded in a steady input/output timing.

REFERENCES:
patent: 5051827 (1991-09-01), Fairhurst
patent: 5771081 (1998-06-01), Lee

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